85314AGI-11

www.icst.com/products/hiperclocks.html

REV. C MAY 24, 2005

1

Integrated

Circuit

Systems, Inc.

ICS85314I-11

The ICS85314I-11 is a low skew, high perfor-

mance 1-to-5 Differential-to-2.5V/3.3V LVPECL

fanout buffer and a member of the HiPerClockS™

family of High Performance Clock Solutions from

ICS. The ICS85314I-11 has two selectable dif-

ferential clock inputs. The CLK0, nCLK0 and CLK1, nCLK1

pairs can accept most standard differential input levels. The

clock enable is internally synchronized to eliminate runt clock

pulses on the outputs during asynchronous asser tion/

deassertion of the clock enable pin.

Guaranteed output and part-to-part skew characteristics make

the ICS85314I-11 ideal for those applications demanding well

defined performance and repeatability.

• 5 differential 2.5V/3.3V LVPECL outputs

• Selectable differential CLKx, nCLKx inputs

• CLK0, nCLK0 and CLK1, nCLK1 pairs can accept the

following differential input levels: LVPECL, LVDS, LVHSTL,

HCSL, SSTL

• Maximum output frequency: 700MHz

• Translates any single-ended input signal to 3.3V

LVPECL levels with resistor bias on nCLK input

• Output skew: 30ps (maximum)

• Part-to-part skew: 350ps (maximum)

• Propagation delay: 1.8ns (maximum)

• RMS phase jitter @ 155.52MHz (12kHz - 20MHz):

0.05ps (typical)

• LVPECL mode operating voltage supply range:

V

• -40°C to 85°C ambient operating temperature

• Available in both standard and lead-free RoHS-compliant

packages

Q0

nQ0

Q1

nQ1

Q2

nQ2

Q3

nQ3

Q4

nQ4

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

nCLK_EN

nCLK1

CLK1

RESERVED

nCLK0

CLK0

CLK_SEL

HiPerClockS™

ICS

ICS85314I-11

20-Lead TSSOP

6.5mm x 4.4mm x 0.92mm Package Body

G Package

Top View

ICS85314I-11

20-Lead SOIC

7.5mm x 12.8mm x 2.3mm Package Body

M Package

Top View

CLK0

nCLK0

CLK1

nCLK1

Q0

nQ0

Q1

nQ1

Q2

nQ2

Q3

nQ3

Q4

nQ4

0

1

nCLK_EN

CLK_SEL

D

Q

CK

0

1