840022AG

www.icst.com/products/hiperclocks.html

REV. A JANUARY 11, 2005

7

Integrated

Circuit

Systems, Inc.

ICS840022

PRELIMINARY

Figure 3A shows a schematic example of the ICS840022. An

example of LVCMOS termination is shown in this schematic.

Additional LVCMOS termination approaches are shown in the

LVCMOS Termination Application Note. In this example, an 18pF

parallel resonant 25MHz crystal is used for generating 125MHz

output frequency. The C1 = 22pF and C2pF = 33pF are recom-

mended for frequency accuracy. For different board layout, the

C1 and C2 values may be slightly adjusted for optimizing fre-

quency accuracy.

Figure 3B shows an example of ICS840022 P.C. board layout.

The crystal X1 footprint shown in this example allows installa-

tion of either surface mount HC49S or through-hole HC49 pack-

age.The footprints of other components in this example are listed

in the

Table 7. There should be at least one decoupling capacitor

per power pin. The decoupling capacitors should be located as

close as possible to the power pins. The layout assumes that

the board has clean analog power ground plane.

e

c

n

e

r

e

f

e

Re

z

i

S

2

C

,

1

C2

0

4

0

3

C5

0

8

0

5

C

,

4

C3

0

6

0

3

R

,

2

R

,

1

R3

0

6

0

t

n

e

n

o

p

m

o

c

s

t

s

il

,

7

e

l

b

a

T

:

E

T

O

N

.

e

l

p

m

a

x

e

t

u

o

y

a

l

s

i

h

t

n

i

n

w

o

h

s

s

e

z

i

s

C1

22pF

LVCMOS

VDDA

U1

ICS840022

1

2

3

4

8

7

6

5

VDDA

OE

XTAL_OUT

XTAL_IN

VDD

Q0

GND

FREQ_SEL

VDD

FRE_SEL

R2

10

VDD=3.3V

VDD

C4

0.1u

Q

X1

OE

R1

1K

C2

33pF

VDD

R3

33

C3

10uF

Zo = 50 Ohm

C5

0.1u