84427CM

www.icst.com/products/hiperclocks.html

REV. D NOVEMBER 30, 2005

7

Integrated

Circuit

Systems, Inc.

ICS84427

PRELIMINARY

As in any high speed analog circuitry, the power supply pins

are vulnerable to random noise. The ICS84427 provides sepa-

rate power supplies to isolate any high switching

noise from the outputs to the internal PLL. V

be individually connected to the power supply plane through

vias, and bypass capacitors should be used for each pin. To

achieve optimum jitter performance, power supply isolation is

required. Figure 1 illustrates how a 24

Ω resistor along with a

10

μF and a .01μF bypass capacitor should be connected to

each V

24

Ω

V

DDA

10

μF

.01

μF

3.3V

.01

μF

V

DD

The ICS84427 has been characterized with 18pF parallel

resonant crystals. The capacitor values, C1 and C2, shown

in Figure 2 below were determined using a 25MHz, 18pF

parallel resonant crystal and were chosen to minimize the

ppm error. The optimum C1 and C2 values can be slightly

adjusted for different board layouts.

C1

18p

X1

18pF Parallel Crystal

C2

22p

XTAL_IN

XTAL_OUT