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ICS84329BVT датащи(PDF) 12 Page - Integrated Circuit Systems

номер детали ICS84329BVT
подробное описание детали  700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
PDF  19 Pages
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производитель  ICST [Integrated Circuit Systems]
домашняя страница  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS84329BVT датащи(HTML) 12 Page - Integrated Circuit Systems

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84329BV
www.icst.com/products/hiperclocks.html
REV. B JANUARY 18, 2006
12
Integrated
Circuit
Systems, Inc.
ICS84329B
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
V
CC - 2V
50
Ω
50
Ω
RTT
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
RTT =
Z
o
1
((V
OH + VOL) / (VCC – 2)) – 2
3.3V
125
Ω
125
Ω
84
Ω
84
Ω
Z
o = 50Ω
Z
o = 50Ω
FOUT
FIN
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, ter-
minating resistors (DC current path to ground) or current
sources must be used for functionality. These outputs are
FIGURE 6B. LVPECL OUTPUT TERMINATION
FIGURE 6A. LVPECL OUTPUT TERMINATION
designed to drive 50
Ω transmission lines. Matched imped-
ance techniques should be used to maximize operating
frequency and minmize signal distortion. Figures 6A and
6B show two different layouts which are recommended only
as guidelines.Other suitable clock layouts may exist and it
would be recommended that the board designers simulate
to guarantee compatibility across all printed circuit and clock
component process variations.
TERMINATION FOR LVPECL OUTPUTS



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