8516FYI

www.icst.com/products/hiperclocks.html

REV. A JULY 30, 2004

10

Integrated

Circuit

Systems, Inc.

ICS8516I

The transistor count for ICS8516I is: 1821

θ

JA

VS

θθθθθ

0

200

500

Single-Layer PCB, JEDEC Standard Test Boards

67.8°C/W

55.9°C/W

50.1°C/W

Multi-Layer PCB, JEDEC Standard Test Boards

47.9°C/W

42.1°C/W

39.4°C/W

NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

C5

0.1u

(U1-12)

Zo = 50 Ohm

Zo = 50 Ohm

(U1-25)

LVDS_input

+

-

(U1-31)

Zo = 50 Ohm

C3

0.1u

C6

0.1u

U1

8516

13

14

15

16

17

18

19

20

21

22

23

24

48

47

46

45

44

43

42

41

40

39

38

37

nQ1

Q1

nQ0

Q0

GND

nCLK

CLK

GND

Q15

nQ15

Q14

nQ14

Q6

nQ6

Q7

nQ7

GND

OE1

OE2

GND

nQ8

Q8

nQ9

Q9

Zo = 50 Ohm

R16

100

Zo = 50 Ohm

VDD=3.3V

LVDS_input

+

-

Zo = 50 Ohm

Zo = 50 Ohm

Zo = 50 Ohm

VDD=3.3V

R10

100

C4

0.1u

C2

0.1u

LVDS_Driver

R17

100

LVDS_input

+

-

(U1-1)

Decoupling capacitors located near the power pins

(U1-6)

(U1-36)

R1

100

C1

0.1u

Figure 4 shows a schematic example of ICS8516I. In this ex-

ample, the input is driven by an LVDS driver. For LVDS buffer, it

is recommended to terminate the unused outputs for better sig-

nal integrity. The decoupling capacitors should be physically

located near the power pin.