ACE7333C

28V, 3A, 500KHz Synchronous Step-Down DC/DC Converter

VER 1.2

9

For ceramic capacitors, the capacitance dominates the impedance at the switching frequency and causes

most of the output voltage ripple. For simplification, estimate the output voltage ripple with:

For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For

simplification, the output ripple can be approximated with:

The characteristics of the output capacitor also affect the stability of the regulation system. The

ACE7333C can be optimized for a wide range of capacitance and ESR values.

PCB Layout Recommendation

The device’s performance and stability are dramatically affected by PCB layout. It is recommended to

follow these general guidelines shown as below:

1.

Place the input capacitors and output capacitors as close to the device as possible. The traces which

connect to these capacitors should be as short and wide as possible to minimize parasitic inductance

and resistance.

2.

Place feedback resistors close to the FB pin.

3.

Keep the sensitive signal (FB) away from the switching signal (SW).

4.

The exposed pad of the package should be soldered to an equivalent area of metal on the PCB. This

area should connect to the GND plane and have multiple via connections to the back of the PCB as

well as connections to intermediate PCB layers. The GND plane area connecting to the exposed pad

should be maximized to improve thermal performance.

5.

Multi-layer PCB design is recommended.