SLG46811 datasheet(2/171 Pages) DIALOG

2 / 171 page

Datasheet

14-Apr-2021

CFR0011-120-00

Revision 3.0

2 of 171

SLG46811

GreenPAK Programmable Mixed-Signal Matrix

Contents

General Description ................................................................................................................................................................. 1

Key Features............................................................................................................................................................................. 1

Applications.............................................................................................................................................................................. 1

1 Block Diagram ...................................................................................................................................................................... 7

2 Pinout .................................................................................................................................................................................... 8

2.1 Pin Configuration - STQFN- 12 .............................................................................................................................. 8

3 Characteristics ...................................................................................................................................................................11

3.1 Absolute Maximum Ratings .................................................................................................................................11

3.2 Electrostatic Discharge Ratings ...........................................................................................................................11

3.3 Recommended Operating Conditions .................................................................................................................11

3.4 Electrical Characteristics ......................................................................................................................................12

3.5 I2C Pins Electrical Characteristics ........................................................................................................................14

3.6 Macrocells Current Consumption .........................................................................................................................17

3.7 Timing Characteristics ..........................................................................................................................................17

3.8 Counter/Delay Characteristics .............................................................................................................................19

3.9 Oscillator Characteristics .....................................................................................................................................20

3.10 MS ACMP Characteristics ..................................................................................................................................20

3.11 Analog Temperature Sensor Characteristics .....................................................................................................23

4 User Programmability ........................................................................................................................................................24

5 IO Pins .................................................................................................................................................................................25

5.1 GPIO Pins ............................................................................................................................................................25

5.2 GPI Pins ...............................................................................................................................................................25

5.3 Pull-Up/Down Resistors .......................................................................................................................................25

5.4 Fast Pull-up/down during Power-up .....................................................................................................................25

5.5 GPI Structure .......................................................................................................................................................25

5.6 GPIO with I2C Mode IO Structure ........................................................................................................................26

5.7 Matrix OE IO Structure .........................................................................................................................................27

5.8 Register OE IO Structure .....................................................................................................................................28

5.9 IO Typical Performance .......................................................................................................................................29

6 Connection Matrix ..............................................................................................................................................................32

6.1 Matrix Input Table ...............................................................................................................................................33

6.2 Matrix Output Table ..............................................................................................................................................35

6.3 Connection Matrix Virtual Inputs ..........................................................................................................................37

6.4 Connection Matrix Virtual Outputs .......................................................................................................................38

7 Combination Function Macrocells ....................................................................................................................................39

7.1 2-Bit LUT or D Flip-Flop Macrocells .....................................................................................................................39

7.2 2-bit LUT or Programmable Pattern Generator ....................................................................................................41

7.3 3-Bit LUT or D Flip-Flop with Set/Reset Macrocells Or Shift Register Macrocells ...............................................42

7.4 3-Bit LUT or D Flip-Flop with Set/Reset Macrocells .............................................................................................50

7.5 4-Bit LUT or D Flip-Flop with Set/Reset Macrocell ...............................................................................................52

8 Multi-Function Macrocells .................................................................................................................................................55

8.1 3-Bit LUT or DFF/Latch with 8-Bit Counter/Delay Macrocells ..............................................................................55

8.2 CNT/DLY Timing Diagrams ..................................................................................................................................64

8.3 FSM Timing Diagrams .........................................................................................................................................71

9 Multichannel Sampling Analog Comparator ....................................................................................................................72

9.1 Multichannel Sampling ACMP Block Diagram .....................................................................................................73

9.2 MS ACMP Timing Diagrams ................................................................................................................................74

9.3 ACMP Typical Performance .................................................................................................................................76

10 Programmable Delay/Edge Detector ..............................................................................................................................79

10.1 Programmable Delay Timing Diagram - Edge Detector OUTPUT .....................................................................79

11 Additional Logic Function. Deglitch Filter .....................................................................................................................80

12 Voltage Reference ............................................................................................................................................................81

12.1 Voltage Reference Overview .............................................................................................................................81

12.2 Vref Selection Table ...........................................................................................................................................81

13 Clocking ............................................................................................................................................................................82

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