Preliminary

PLL502-22

384MHz – 768MHz Low Phase Noise LVDS VCXO (12 – 24MHz Crystal)

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991

Rev 07/17/01 Page 4

5. Jitter and Phase Noise specification

PARAMETERS

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Period jitter RMS

With capacitive decoupling

between VDD and GND.

7

ps

Accumulated jitter RMS

With capacitive decoupling

between VDD and GND. Over

10,000 cycles.

11

ps

Phase Noise relative to carrier

622MHz @100Hz offset

-80

dBc/Hz

Phase Noise relative to carrier

622MHz @1kHz offset

-109

dBc/Hz

Phase Noise relative to carrier

622MHz @10kHz offset

-130

dBc/Hz

Phase Noise relative to carrier

622MHz @100kHz offset

-132

dBc/Hz

6. LVDS Electrical Characteristics

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Output Differential Voltage

247

355

454

mV

-50

50

mV

Output High Voltage

1.4

1.6

V

Output Low Voltage

0.9

1.1

V

Offset Voltage

1.125

1.2

1.375

V

Offset Magnitude Change

Ω

(see figure)

0

3

25

mV

Power-off Leakage

±1

±10

uA

Output Short Circuit Current

-5.7

-8

mA