PLL702-02

Low EMI Peripheral Clock Generator for Notebook & Motherboards

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991

www.phaselink.com

Rev 08/30/05 Page 3

PIN DESCRIPTIONS

Name

Pin#

Type

Description

VDDOSC

1

P

3.3V power supply for oscillator, analog core and digital circuitry.

XIN

2

I

Crystal input: accepts either 24.576MHz or 14.31818MHz fundamental crystal (CL =

20pF, parallel resonant mode, +/-20ppm). On-chip load capacitors: no external load

capacitors required. (See the table #4 )

XOUT

3

O

Crystal output.

VSSOSC

4

P

Ground connection.

VSSB1

5

P

Ground connection.

24.576MHz/SST0

6

B

Bi-directional and Tri-Level pin. Upon power-on, the value of SST0 is latched in and

used to select the SST control (see Spread Spectrum selection table 1). Tri level input:

M = Do not connect, 1 = Pull up, 0 = Pull down. After power-up this pin acts as

24.576MHz output clock.

24.576MHz/SST1

7

B

Bi-directional pin. Upon power-on, the value of SST1 is latched in and used to select

the SST control (see Spread Spectrum selection table 1). Internal pull down defaults

SST1 to 0, use external pull-up to set to 1. After power-up this pin acts as 24.576MHz

output clock.

VDDB1

8

P

3.3V power supply for 24.576MHz clock.

VDD25M

9

P

3.3V power supply for 25MHz, 10_8MHz, 12MHz, 24.576MHz.

25MHzx2

10

O

25MHz Ethernet output clock (double drive strength).

VSS25M

11

P

Ground connection.

12MHz/VDD_SEL

12

B

Bi-directional pin. Upon power-on, the value of VDD_SEL is latched in and used to

select the power (see Power Selection table 2 ). Internal pull down defaults SST1 to 0,

use external pull-up to set to 1. After power-up this pin acts as 12MHz output clock.

10_8MHz/SEL10_8

13

B

Bi-directional and Tri-level pin. Upon power-on, the value of SEL10_8 is latched in and

used to select the output frequency (See frequency selection table 3 ). Tri level input: M

= Do not connect, 1 = Pull up, 0 = Pull down. After power-up this pin acts as 10MHz

clock, 8MHz clock, or “No output”, depending on SEL10_8.

VSSB2

14

P

Ground connection.

27_14.318MHz/XTAL_SEL

15

B

Bi-directional pin. Upon power-on, the value of XTAL_SEL is latched in and used to set

the input crystal frequency (24.575MHz or 14.31818MHz). Set XTAL_SEL to 0 (default)

for 24.576MHz input crystal, set XTAL_SEL to 1 for 14.31818MHz input crystal (see

Crystal Selection Table on page 1). . After power-up this pin acts as 27MHz output

(with 24.576MHz crystal) or as 14.31818MHz pass through clock (with 14.31818MHz

crystal), depending on the input crystal.

The 27MHz output can be modulated for low EMI using Spread Spectrum.

VDDB2

16

P

3.3V power supply for 27MHz, 10MHz, 12MHz, and 24.576MHz.

FUNCTIONAL DESCRIPTION

Tri-level and two-level inputs

In order to reduce pin usage, the PLL702-02 uses tri-level input pins. These pins allow 3 levels for input selection: namely, 0 =

Connect to GND, 1 = Connect to VDD, M = Do not connect. Thus, unlike the two-level selection pins, the tri-level input pins are

in the “M” (mid) state when not connected. In order to connect a tri-level pin to a logical “zero”, the pin must be connected to

GND. Likewise, in order to connect to a logical “one”, the pin must be connected to VDD.