Preliminary

PLL502-10

750kHz – 400MHz Low Phase Noise VCXO (for 12 – 25MHz Crystals)

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991

Rev 11/06/02 Page 4

4. General Electrical Specifications

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Fout < 24MHz

25/25/15

24MHz < Fout < 96MHz

65/45/30

Supply Current,

Dynamic (with

Loaded Outputs)

PECL/LVDS/CMOS

96MHz < Fout < 400MHz

100/80/40

mA

Operating Voltage

3.13

3.47

V

Output Clock Duty

Cycle

@ 1.4V (CMOS)

@ 1.25V (LVDS)

@ Vdd – 1.3V (PECL)

45

45

45

50

50

50

55

55

55

%

Short Circuit Current

±50

mA

5. Jitter specifications

PARAMETERS

CONDITIONS

FREQUENCY

MIN.

TYP.

MAX.

UNITS

19.44MHz

5

77.76MHz

8

Period jitter RMS

With capacitive decoupling between

VDD and GND.

155.52MHz

9

ps

Accumulated jitter RMS

With capacitive decoupling between

VDD and GND. Over 10,000 cycles.

155.52MHz

TBM

ps

Integrated jitter RMS

Integrated 12 kHz to 20 MHz

155.52MHz

3

4

ps

6. Phase noise specifications

PARAMETERS

FREQUENCY

@10Hz

@100Hz

@1kHz

@10kHz

@100kHz

UNITS

19.44MHz

-60

-90

-112

-140

-150

106.25MHz

-60

-90

-112

-127

-125

Phase Noise relative to

carrier

155.52MHz

-60

-90

-112

-125

-123

dBc/Hz

Note: Phase Noise measured at VCON = 0V