PCF8545ATT datasheet(9/51 Pages) NXP

9 / 51 page

NXP Semiconductors

PCF8551

Universal 36 × 4 LCD segment driver

Bit

Symbol

Value

Description

enhanced power drive scheme for higher display

loads

multiplex drive mode selection

00[1]

1:4 multiplex drive mode; COM0 to COM3 (nMUX =

1:3 multiplex drive mode; COM0 to COM2 (nMUX =

1:2 multiplex drive mode; COM0 and COM1 (nMUX

= 2)

3 to 2

MUX[1:0]

static drive mode; COM0 (nMUX = 1)

bias mode selection

0[1]

1⁄3 bias (abias = 2)

B[2]

1⁄2 bias (abias = 1)

display enable[3]

0[1]

display disabled; device is in power-down mode

display enabled; device is in power-on mode

Table 6. Display_ctrl_1 - display control command 1 register (address 02h) bit

description...continued

[1]

Default value.

[2]

Not applicable for static drive mode.

[3]

See Section 7.3.1.

7.2.2.1 Enhanced power drive mode

By setting the BOOST bit to logic 1, the driving capability of the display signals is

increased to cope with large displays with a higher effective capacitance. Setting this bit

increases the current consumption on VLCD.

7.2.2.2 Multiplex drive mode

MUX[1:0] sets the multiplex driving scheme and the associated backplane drive signals,

which are active. For further details, see Section 8.2.

7.2.3 Command: Display_ctrl_2

Bit

Symbol

Value

Description

7 to 3

00000

default value

blink control

00[1]

blinking off

blinking on, fblink = 0.5 Hz

blinking on, fblink = 1 Hz

2 to 1

BL[1:0]

blinking on, fblink = 2 Hz

INV

inversion mode selection

Table 7. Display_ctrl_2 - display control command 2 register (address 03h) bit

description

PCF8551

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3.1 — 3 May 2021

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