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Evaluates: MAX3522B

MAX3522B Evaluation Kit

Detailed Description of Hardware

(or Software)

Gain Calculation

A minimum loss pad (MLP R18/R17) after the input port

(J1) transforms the 50Ω test equipment impedance to

100Ω input transformer (T3) impedance, with a voltage loss

of 4.7dB. T3 converts the unbalanced 100Ω impedance

to a balanced 100Ω, matching the overall impedance

of input of the MAX3522B (200Ω) paralleled with 200Ω

resistor (R12 + R13). The power loss of T3 is approximately

0.5dB across the operating frequency range of the

MAX3522B. So the total voltage loss due to T3 and MLP

(R17/R18 ) is 5.2 dB.

T3 and MLP (R17/R18 ) are included to assist in evaluation

of the IC using standard 50Ω lab equipment. They are not

required for most applications.

The 1:4 impedance output transformer (T1 or T2) provides

6dB voltage gain, which is included in overall MAX3522B

voltage gain specified in the IC data sheet.

A minimum loss pad (MLP R5/R6 or R7/R8) after the

output of T1 or T2 transforms the 75Ω output impedance

of the T1/T2 to 50Ω test equipment impedance, with a

voltage loss of 7.5dB. To calculate the voltage gain of the

MAX3522B between J1 and J2 or between J1 and J3:

Voltage Gain = POUT(dBm) + 7.5dB (MLP) - [PIN(dBm)

- 5.2dB (T3/MLP)]

= POUT(dBm) - PIN(dBm) + 12.7dB

The voltage gain should be between 24.2dB and 26.2dB

under gain code 63.

Layout Considerations

The MAX3522B is a high-performance RF amplifier. PCB

layout and external component selection is critical to

achieve specified performance. We strongly recommend

the user to follow the EV kit PCB layout, including number

and placement of ground throughputs, internal layer

geometry, and component size, as closely as possible.

Keep RF signal lines as short as possible to minimize

losses and radiation. This is especially true for the output

traces between the MAX3522B and transformers T1/T2.

To minimize second-order distortion, traces in the balanced

input and output circuitry should be as symmetric as

possible. The exposed pad must be soldered evenly

to the board’s ground plane for proper operation. Use

abundant throughputs beneath the exposed pad, and

surrounding area for maximum heat dissipation. Use

abundant ground throughputs between RF traces to

minimize undesired coupling.

To minimize coupling between different sections of the

device, the ideal power-supply layout is a star configuration,

which has a large decoupling capacitor at the central

impedance to ground at the frequency of interest. Do

not share ground vias among multiple connections to the

PCB ground plane.

Component Suppliers

SUPPLIER

WEBSITE

Emerson Network Power

www.emersonnetworkpower.com

Keystone Electronics Corp.

www.keyelco.com

Murata Americas

www.murata.com

MACOM

www.macom.com