AT25DF081A datasheet(2/54 Pages) DIALOG

2 / 54 page

Features

• Single 2.7V - 3.6V Supply

• Serial Peripheral Interface (SPI) Compatible

– Supports SPI Modes 0 and 3

– Supports RapidS™ Operation

– Supports Dual-Input Program and Dual-Output Read

• Very High Operating Frequencies

– 100MHz for RapidS

– 85MHz for SPI

– Clock-to-Output (tV) of 5ns Maximum

• Flexible, Optimized Erase Architecture for Code + Data Storage Applications

– Uniform 4-Kbyte Block Erase

– Uniform 32-Kbyte Block Erase

– Uniform 64-Kbyte Block Erase

– Full Chip Erase

• Individual Sector Protection with Global Protect/Unprotect Feature

– 16 Sectors of 64-Kbytes Each

• Hardware Controlled Locking of Protected Sectors via WP Pin

• Sector Lockdown

– Make Any Combination of 64-Kbyte Sectors Permanently Read-Only

• 128-Byte Programmable OTP Security Register

• Flexible Programming

– Byte/Page Program (1- to 256-Bytes)

• Fast Program and Erase Times

– 1.0ms Typical Page Program (256 Bytes) Time

– 50ms Typical 4-Kbyte Block Erase Time

– 250ms Typical 32-Kbyte Block Erase Time

– 400ms Typical 64-Kbyte Block Erase Time

• Automatic Checking and Reporting of Erase/Program Failures

• Software Controlled Reset

• JEDEC Standard Manufacturer and Device ID Read Methodology

• Low Power Dissipation

– 5mA Active Read Current (Typical at 20MHz)

– 5µA Deep Power-Down Current (Typical)

• Endurance: 100,000 Program/Erase Cycles

• Data Retention: 20 Years

• Complies with Full Industrial Temperature Range

• Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options

– 8-lead SOIC (150-mil and 208-mil wide)

– 8-pad Ultra Thin DFN (5 x 6 x 0.6mm)

8-Mbit

2.7V Minimum

SPI Serial Flash

Memory

AT25DF081A

8715E–SFLSH–11/2017

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