PLL620-80
Low Phase Noise XO (9.5-65MHz Output)
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com Rev 11/09/04 Page 3
4. Jitter Specifications
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Period jitter RMS at 27MHz
2.3
Period jitter peak-to-peak at 27MHz
With capacitive decoupling between
VDD and GND. Over 10,000 cycles
18.5
20
ps
Accumulated jitter RMS at 27MHz
2.3
Accumulated jitter peak-to-peak at 27MHz
With capacitive decoupling between
VDD and GND. Over 1,000,000
cycles.
24
25
ps
Random Jitter
“RJ” measured on Wavecrest SIA
3000
2.3
ps
Measured on Wavecrest SIA 3000
5. Phase Noise Specifications
PARAMETERS
FREQUENCY
@10Hz
@100Hz
@1kHz
@10kHz @100kHz
UNITS
Phase Noise relative
to carrier
27MHz
-75
-100
-125
-140
-145
dBc/Hz
Note: Phase Noise measured on Agilent E5500
6. CMOS Output Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
IOH
VOH= VDD-0.4V, VDD=3.3V
30
mA
Output drive current
(High Drive)
IOL
VOL = 0.4V, VDD = 3.3V
30
mA
IOH
VOH= VDD-0.4V, VDD=3.3V
10
mA
Output drive current
(Standard Drive)
IOL
VOL = 0.4V, VDD = 3.3V
10
mA
Output Clock Rise/Fall Time
(Standard Drive)
0.3V ~ 3.0V with 15 pF load
2.4
Output Clock Rise/Fall Time
(High Drive)
0.3V ~ 3.0V with 15 pF load
1.2
ns
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
