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STW4810 датащи(PDF) 50 Page - STMicroelectronics |
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STW4810 датащи(HTML) 50 Page - STMicroelectronics |
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50 / 72 page ![]() 5 Electrical and timing characteristics STw4810 50/72 Rev3 VANA VAUX Table 40. LDO regulators - VANA Symbol Description Test conditions Min. Typ. Max. Units VANA regulator in normal mode VBAT Input power supply Battery voltage 2.7 3.6 4.8 V VOUT Output voltage -5% 2.5 +5% V IOUT Output current 10 mA ISHORT Short-circuit limitation 39 51 64 mA IQ Quiescent current IOUT = 0 mA 30 µA ILKG Power-down current EN_VANA = 0 1 µA PSRR(1) 1. Guaranteed by design Power supply rejection Vpp = 0.3 V f < 10 kHz 45 dB LIR Line regulation VBAT: [2.7; 4.8] V 5 mV LDR Load regulation IOUT: [0.1; 10] mA 5 mV LIRT Transient line regulation ∆VBAT = 300 mV tR = tF = 10 µs 3 mV LDRT Transient load regulation IOUT = [0.1; 10] mA tR = tF = 1 µs 15 mV Table 41. LDO regulators - VAUX Symbol Description Test conditions Min. Typ. Max. Units VAUX Regulator in Normal Mode (PDN_VAUX= 1, SLEEP= ‘0’) VBAT Input power supply VOUT = 1.5V 1.7 4.8 V VOUT = 1.8/2.5 V 2.7 3.6 4.8 V VOUT = 2.8 V 33.6 4.8 VOUT Output voltage VAUX_SEL[1:0] 00 (default) 01 10 11 -3% 1.5 1.8 2.5 2.8 +3% V IOUT Output current 150 mA ISHORT Short-circuit limitation 500 700 900 mA IQ Quiescent current IOUT = 0 mA 30 µA |
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