MA5621 datasheet(2/2 Pages) MPOWER

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MA5621

Major Power Technology Co., Ltd.

Rev.1.2

th, Mar. 2018



PIN ASSIGNMENT

The packages of MA5621 is MSOP-10L-EP ; the pin assignment is given by:

( Top view )

MSOP-10L-EP

GND

CS1

SENSE

CS2

VIN

E-PAD

(GND)

Name

Description

SENSE

Power Input and Current Limit SENSE pin. Bypass SENSE (of High-side NMOS) to Ground

(of Low-side NMOS) with high capacitance ceramic MLCC (e.g. X5R) to eliminate noise, and

bypass MA5621 SENSE-pin to pin6-GND with a 0.1uf～1uf ceramic MLCC. (e.g. X5R.).

Ensure a very large SENSE area for High-side NMOS cooling.

VIN

Power Input pin. Bypass VIN to Ground (of low-side Power MOSFET) with a suitably high

capacitance E-CAP to eliminate noise, and bypass MA5621 pin3-VIN to pin6-GND with a

0.1uf ceramic MLCC (e.g. X5R.) Connect a high power package (1206 at least), precision

resistor (±1% at least) from this pin to SENSE-pin, and a large VIN area for resistor cooling

is necessary

Gate driver for external high-side NMOS.

Switching node and Switching sense pin.

Gate driver for external Low-side NMOS.

GND Signal Ground, Output CAP Ground, FB Ground and COMP Ground.

Negative feedback Input pin. FB senses the output voltage to regulate voltage. Drive FB with

a resistive voltage divider from the output voltage, and connect a CFF (X5R, 3.3nf to 22nf) as

a feed-forward CAP from FB to output. If output voltage is higher than 12V or multiple output

voltage steps (like USB PD or QC2.0/3.0/4.0), a CFB (X5R, 1nf to 10nf) as a feed-backward

CAP from FB to GND is necessary.

CS1 The Current Sense 1st channel pin.

CS2 The Current Sense 2nd channel pin.

Boot-Strap pin. It supplies high-side gate driver. Decouple this pin to LX pin with 0.1uf

ceramic CAP (e.g. X5R) and a low resistance Resistor (4.7～24Ω .)

E-PAD Exposed pad. Connect to GND.

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