MIC7122 datasheet(11/22 Pages) MICROCHIP

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DS20006290A-page 11

MIC7122

3.0

APPLICATION INFORMATION

3.1

Input Common-Mode Voltage

The MIC7122 tolerates input overdrive by at least

300 mV beyond either rail without producing phase

inversion.

If the absolute maximum input voltage is exceeded, the

input current should be limited to ±5 mA maximum to

prevent reducing reliability. A 10 kΩ series input

resistor, used as a current limiter, will protect the input

structure from voltages as large as 50V above the

supply or below ground. See Figure 3-1.

VIN

VOUT

10kΩ

RIN

FIGURE 3-1:

Input Current-Limit

Protection.

3.2

Output Voltage Swing

Sink and source output resistances of the MIC7122 are

equal. Maximum output voltage swing is determined by

the load and the approximate output resistance. The

output resistance is:

EQUATION 3-1:

ROUT

V DROP

I LOAD

------------------

VDROP is the voltage dropped within the amplifier

output stage. VDROP and ILOAD can be determined from

the VO (output swing) portion of the appropriate

Electrical Characteristics table. ILOAD is equal to the

typical output high voltage minus V+/2 and divided by

RLOAD. For example, using the DC Electrical

Characteristics (5V) table, the typical output high

voltage drops 13 mV using a 2 kΩ load (connected to

V+/2), which produces an ILOAD of:

EQUATION 3-2:

5.0V

0.013V

–

2.5V

–



------------------------------------------------------

1.244mA

Because of output stage symmetry, the corresponding

typical output low voltage (13 mV) also equals VDROP.

Then:

EQUATION 3-3:

ROUT

0.013V

0.001244A

--------------------------

10.5



3.3

Power Dissipation

The MIC7122 output drive capability requires

considering power dissipation. If the load impedance is

low, it is possible to damage the device by exceeding

the 125°C junction temperature rating.

On-chip power consists of two components: supply

power and output stage power. Supply power (PS) is

the product of the supply voltage (VS = VV+ – VV–) and

supply current (IS). Output stage power (PO) is the

product of the output stage voltage drop (VDROP) and

the output (load) current (IOUT).

Total on-chip power dissipation is:

EQUATION 3-4:

PS PO

Where:

PD = Total On-Chip Power

PS = Supply Power Dissipation

PO = Output Power Dissipation

EQUATION 3-5:

V S IS





V DROP IOUT





Where:

VS = VV+ – VV–

IS = Power Supply Current

VDROP = VV+ – VOUT (Sourcing Current)

VDROP = VOUT – VV– (Sinking Current)

Equation 3-4 and Equation 3-5 address only steady

state (DC) conditions. For non-DC conditions, the user

must estimate power dissipation based on the RMS

value of the signal.

The task is one of determining the allowable on-chip

power dissipation for operation at a given ambient

temperature and power supply voltage. From this

determination, one may calculate the maximum

allowable power dissipation and, after subtracting PS,

determine the maximum allowable load current, which

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