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MCP6476 датащи(PDF) 16 Page - Microchip Technology |
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MCP6476 датащи(HTML) 16 Page - Microchip Technology |
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16 / 46 page ![]() MCP6476/6R/6U/7/9 DS20006419B-page 16 2020-2021 Microchip Technology Inc. 4.1.4 NORMAL OPERATION The input stage of the MCP6476/6R/6U/7/9 op amp uses two differential input stages in parallel. One oper- ates at a low Common-Mode Input Voltage (VCM), while the other operates at a high VCM. With this topology, the device operates with a VCM up to 300 mV above VDD and 300 mV below VSS. The input offset voltage is measured at VCM = VSS – 0.3V and VDD + 0.3V to ensure proper operation. The transition between the input stages occurs when VCM is near VDD – 0.9V (see Figures 2-3 and 2-4). For the best distortion performance and gain linearity, with noninverting gains, avoid this region of operation. 4.2 Rail-to-Rail Output The output voltage range of the MCP6476/6R/6U/7/9 op amp is 0.006V (typical) and 5.494V (typical) when RL = 10 k is connected to VDD/2 and VDD = 5.5V. Refer to Figures 2-16 and 2-17 for more information. 4.3 Start-up The MCP6476/6R/6U/7/9 family of parts quickly con- trols the output when power (VDD) is initially applied to the device (start-up). Bypass capacitors are removed during the start-up testing to minimize inrush currents (see Figure 4-3). When the op amp is controlled and is off, the output impedance is high and VOUT will be VL or 1V. When the op amp turns on, the output becomes low-impedance and VOUT will follow the input sine wave; this is used as the start-up time. FIGURE 4-3: Start-up Test Circuit. Figure 4-4 shows the input voltage (blue line) for the MCP6477 and the output voltage (black line). When power is first applied to the MCP6477, the output is turned off (Point A) and driven by the load. After 6 µs, the output is turned on (Point B) and VOUT follows the input sine wave. FIGURE 4-4: Start-up Time Voltages. 4.4 Capacitive Loads Driving large capacitive loads can cause stability problems for voltage feedback op amps. As the load capacitance increases, the feedback loop’s phase margin decreases and the closed-loop bandwidth is reduced. This produces gain peaking in the frequency response, with overshoot and ringing in the step response. While a unity gain buffer (G = +1 V/V) is the most sensitive to the capacitive loads, all gains show the same general behavior. When driving large capacitive loads with the MCP6476/6R/6U/7/9 op amp, a small series resistor at the output (RISO in Figure 4-5) improves the feedback loop’s phase margin (stability) by making the output load resistive at higher frequencies. The bandwidth is generally lower than the bandwidth with no capacitance load. FIGURE 4-5: Output Resistor, RISO, Stabilizes Large Capacitive Loads. + - RL VDD VSS VL = 1V VDD 0 5.5V VOUT A B VIN RISO VOUT CL – + MCP6476 |
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