ACE24LA1024A

Two-wire Serial EEPROM

VER 1.3

4

Functional Description

Memory Organization

ACE24LA1024A, 1M Serial EEPROM:

Internally organized with 512 pages of 256 bytes each, the 1M requires a 17-bit data word address for

random word addressing.

Device Operation

Clock and Data Transitions:

The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during

SCL low time periods (see Figure 1). Data changes during SCL high periods will indicate a start or stop

condition as defined below.

Start Condition:

A high-to-low transition of SDA with SCL high is a start condition which must precede any other command

(see Figure 2).

Stop Condition:

A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop

command will place the EEPROM in a standby power mode (see Figure 2).

Acknowledge:

All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The

EEPROM sends a "0" to acknowledge that it has received each word. This happens during the ninth clock

cycle.

Standby Mode:

The ACE24LA1024A features a low-power standby mode which is enabled: (a) upon power- up and (b)

after the receipt of the STOP bit and the completion of any internal operations.

Memory Reset:

After an interruption in protocol, power loss or system reset, any two-wire part can be reset by following

these steps:

1. Clock up to 9 cycles.

2. Look for SDA high in each cycle while SCL is high and then.

3. Create a start condition.