ACE25AB400G

Serial NOR Flash Memory 4M bits 3.0V Dual I/O Serial Flash Memory with 4KB Uniform Sector

VER 1.1

21

32KB Block Erase (BE) (52H)

The 32KB Block Erase (BE) command is for erasing the all data of the chosen block. A Write Enable

(WREN) command must previously have been executed to set the Write Enable Latch (WEL) bit. The

32KB Block Erase (BE) command is entered by driving CS# low, followed by the command code, and

three address bytes on SI.

Any address inside the block is a valid address for the 32KB Block Erase (BE) command. CS# must be

driven low for the entire duration of the sequence.

The 32KB Block Erase command sequence: CS# goes low→sending 32KB Block Erase command→

3-byte address on SI→CS# goes high. The command sequence is shown in Figure18. CS# must be

driven high after the eighth bit of the last address byte has been latched in; otherwise the 32KB Block

Erase (BE) command is not executed. As soon as CS# is driven high, the self-timed Block Erase cycle

(whose duration is tBE) is initiated.

While the Block Erase cycle is in progress, the Status Register may be read to check the value of the

Write In Progress (WIP) bit. The Write In Progress (WIP) bit is 1 during the self-timed Block Erase cycle,

and is 0 when it is completed. At some unspecified time before the cycle is completed, the Write Enable

Latch (WEL) bit is reset. A 32KB Block Erase (BE) command applied to a block which is protected by the

Block Protect (BP4, BP3, BP2, BP1, BP0) bits (see Table1.0 & 1.1) will not be executed. Note: Power

disruption during erase operation will cause incomplete erase, thus recommend to perform a re-erase

once power resume.

Figure18. 32KB Block Erase Sequence Diagram