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INA237-Q1 датащи(PDF) 23 Page - Texas Instruments |
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INA237-Q1 датащи(HTML) 23 Page - Texas Instruments |
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23 / 48 page ![]() Table 7-4. INA237-Q1 Access Type Codes (continued) Access Type Code Description -n Value after reset or the default value 7.6.1.1 Configuration (CONFIG) Register (Address = 0h) [reset = 0h] The CONFIG register is shown in Table 7-5. Return to the Summary Table. Table 7-5. CONFIG Register Field Descriptions Bit Field Type Reset Description 15 RST R/W 0h Reset Bit. Setting this bit to '1' generates a system reset that is the same as power-on reset. Resets all registers to default values. 0h = Normal Operation 1h = System Reset sets registers to default values This bit self-clears. 14 RESERVED R/W 0h Reserved. Always reads 0. 13-6 CONVDLY R/W 0h Sets the Delay for initial ADC conversion in steps of 2 ms. 0h = 0 s 1h = 2 ms FFh = 510 ms 5 RESERVED R/W 0h Reserved. Always reads 0. 4 ADCRANGE R/W 0h Shunt full scale range selection across IN+ and IN–. 0h = ±163.84 mV 1h = ± 40.96 mV 3-0 RESERVED R 0h Reserved. Always reads 0. www.ti.com INA237-Q1 SBOSA27A – JUNE 2020 – REVISED JUNE 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: INA237-Q1 |
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