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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MCP47FVB02 датащи(PDF) 34 Page - Microchip Technology |
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MCP47FVB02 датащи(HTML) 34 Page - Microchip Technology |
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34 / 92 page  MCP47FVBXX DS20005405A-page 34 2015 Microchip Technology Inc. Register 4-2 shows the format of the Voltage Refer- ence Control register. Each DAC has two bits to control the source of the voltage reference of the DAC. This register is for the volatile memory locations. The width of this register is 2 times the number of DACs for the device. REGISTER 4-2: VOLTAGE REFERENCE (VREF) CONTROL REGISTER (ADDRESS 08h) U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 Single — — — — — — — — — — — — —(1) —(1) VR0B VR0A Dual — — — — — — — — — — — — VR1B VR1A VR0B VR0A bit 15 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown = Single-channel device = Dual-channel device Single Dual bit 15-2 bit 15-4 Unimplemented: Read as ‘0’ bit 1-0 bit 3-0 VRxB-VRxA: DAC Voltage Reference Control bits 11 =VREF pin (Buffered); VREF buffer enabled. 10 =VREF pin (Unbuffered); VREF buffer disabled. 01 = Internal Band Gap (1.22V typical); VREF buffer enabled. VREF voltage driven when powered-down. 00 =VDD (Unbuffered); VREF buffer disabled. Use this state with Power-down bits for lowest current. Note 1: Unimplemented bit, read as ‘0’. |
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