MCP6V51-ESLASHMS datasheet(5/43 Pages) MICROCHIP

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 2018 Microchip Technology Inc.

DS20006136A-page 5

MCP6V51

Maximum Output Voltage Swing

VOH

VDD -150

VDD - 100

—

RL =1 kΩ, VDD = 4.5V

VDD - 2500 VDD -1500

—

RL =1 kΩ, VDD = 45V

VDD -20

VDD -12

—

RL =10 kΩ, VDD = 4.5V

VDD -200

VDD - 100

—

RL =10 kΩ, VDD = 45V

Output Short Circuit Current

ISC+

—46

—

ISC-

—36

—

Closed-loop Output Resistance

ROUT

—16

—

Ω

f= 0.1 MHz, IO =0,

G= 1

Capacitive Load Drive

—100

—

G = 1

Power Supply

Supply Voltage

VDD

4.5

—

Quiescent Current per Amplifier

310

460

590

µA

VDD = 4.5V, IO =0

310

470

590

µA

VDD = 45V, IO =0

—

540

670

µA

IO =0,

TA = -40 to +125°C

(Note 1)

(Figure 2-22)

Power-on Reset (POR) Trip

Voltage

VPOR

—2.3

—

DC ELECTRICAL SPECIFICATIONS (CONTINUED)

Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +4.5V to +45V, VSS = GND,

VCM =VDD/3, VOUT =VDD/2, VL =VDD/2, RL =10kΩ to VL and CL = 100 pF (refer to Figure 1-4 and Figure 1-5).

Parameters

Sym.

Min.

Typ.

Max.

Units

Conditions

Note 1:

Not production tested. Limits set by characterization and/or simulation and provided as design guidance

only.

Figure 2-17 shows how VCML and VCMH changed across temperature for the first production lot.

AC ELECTRICAL SPECIFICATIONS

Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +4.5V to +45V, VSS = GND,

VCM =VDD/3, VOUT =VDD/2, VL =VDD/2, RL =10kΩ to VL and CL = 100 pF (refer to Figure 1-4 and Figure 1-5).

Parameters

Sym.

Min.

Typ. Max.

Units

Conditions

Amplifier AC Response

Gain Bandwidth Product

GBWP

—

1.8

—

MHz

VDD = 4.5V, VIN = 10 mVpp, Gain = 100

—2

—

MHz

VDD = 45V, VIN =10mVpp, Gain = 100

Slew Rate

—

1.2

—

V/µs

(Figure 2-44)

Phase Margin

—

deg.

VDD = 45V

Amplifier Noise Response

Input Noise Voltage

Eni

—0.1

—

µVP-P f=0.01 Hz to 1 Hz

Eni

—0.21

—

µVP-P f = 0.1 Hz to 10 Hz

Input Noise Voltage Density

eni

—10.2

—

nV/√Hz f = 1 kHz

Input Noise Current Density

ini

—4

—

fA/√Hz

Amplifier Step Response

Start-Up Time

tSTR

—

200

—

µs

G = +1, 1% VOUT settling (Note 1)

Offset Correction Settling Time

tSTL

—45

—

µs

G = +1, VIN step of 2V,

VOS within ±100 µV of its final value

Note 1:

Behavior may vary with different gains; see Section 4.3.3 “Offset at Power-Up”.

tSTL and tODR include some uncertainty due to clock edge timing.

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