MAXM17536 datasheet(15/22 Pages) MAXIM

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Detailed Description

The MAXM17536 is a high-efficiency, high-voltage,

synchronous step-down module with dual-integrated

MOSFETs that operates over a 4.5V to 60V input, and

supports a programmable output voltage from 0.9V to

12V, delivering up to 4A current. Built-in compensation

for the entire output-voltage range eliminates the need

for external components. The feedback (FB) regulation

accuracy over -40°C to +125°C is ±1.5%.

The device features a peak-current-mode control

architecture. An internal transconductance-error amplifier

produces an integrated error voltage at an internal node

that sets the duty cycle using a PWM comparator, a high-

side current-sense amplifier, and a slope-compensation

generator. At each rising edge of the clock, the high-

side MOSFET turns on and remains on until either the

appropriate or maximum duty cycle is reached, or the peak

current limit is detected. During the high-side MOSFET’s

on-time, the inductor current ramps up. During the second

half of the switching cycle, the high-side MOSFET turns

off and the low-side MOSFET turns on. The inductor

releases the stored energy as its current ramps down

and provides current to the output. The device features a

MODE/SYNC pin that can be used to operate the device

in PWM, PFM, or DCM control schemes and to synchronize

the switching frequency to an external clock. The device

integrates adjustable-input undervoltage lockout,

adjustable soft-start, open-drain RESET, auxiliary

bootstrap LDO, and DL-to-OUT short-detection features.

Mode Selection (MODE)

The logic state of the MODE/SYNC pin is latched when

VCC and EN/UVLO voltages exceed the respective UVLO

rising thresholds and all internal voltages are ready to

allow LX switching. If the MODE/SYNC pin is open at

power-up, the device operates in PFM mode at light

loads. If the MODE/SYNC pin is grounded at power-up,

the device operates in constant-frequency PWM mode

at all loads. Finally, if the MODE/SYNC pin is connected

to VCC at power-up, the device operates in constant

frequency DCM mode at light loads. State changes on the

MODE/SYNC pin are ignored during normal operation.

PWM-Mode Operation

In PWM mode, the inductor current is allowed to go

negative. PWM operation provides constant frequency

operation at all loads, and is useful in applications

sensitive to changes in switching frequency. However,

the PWM mode of operation gives lower efficiency at light

loads compared to PFM and DCM modes of operation.

PFM-Mode Operation

The PFM mode of operation disables negative inductor

current and additionally skips pulses at light loads for high

efficiency. In PFM mode, the inductor current is forced to

a fixed peak of 2A (typ) every clock cycle until the output

rises to 102.3% of the nominal voltage. Once the output

reaches 102.3% of the nominal voltage, both the high-

side and low-side FETs are turned off and the device

enters hibernate operation until the load discharges the

output to 101.1% of the nominal voltage. Most of the

internal blocks are turned off in hibernate operation to

minimize quiescent current. After the output falls below

101.1% of the nominal voltage, the device comes out

of hibernate operation, turns on all internal blocks, and

again commences the process of delivering pulses

of energy to the output until it reaches 102.3% of the

nominal output voltage. The advantage of the PFM

mode is higher efficiency at light loads because of lower

quiescent current drawn from the supply. The disadvantage

is that the output-voltage ripple is higher compared to

PWM or DCM modes of operation and switching frequency

is not constant at light loads.

DCM-Mode Operation

DCM mode of operation features constant frequency

operation down to lighter loads than PFM mode, by not

skipping pulses but only disabling negative inductor

current at light loads. DCM operation offers efficiency

performance that lies between PWM and PFM modes

Linear Regulator

The MAXM17536 has two internal low-dropout (LDO)

regulators that powers VCC. During power-up, when

the EN/UVLO pin voltage is above the true shutdown

voltage (0.8V), then the VCC is powered from INLDO.

When VCC voltage is above the VCC UVLO threshold

and EXTVCC voltage is greater than 4.7V (typ) the VCC

is powered from EXTVCC LDO. Only one of the two LDOs

is in operation at a time depending on the voltage level

present at EXTVCC. Powering VCC from EXTVCC

increases efficiency at higher input voltages. EXTVCC

voltage should not exceed 24V.

Typical VCC output voltage is 5V. Internally VCC is

bypassed with a 2.2μF ceramic capacitor to PGND. See

the Electrical Characteristics table for the current limit

details for both the regulators. In applications where the

buck converter output is connected to the EXTVCC pin,

if the output is shorted to ground, then the transfer from

EXTVCC LDO to INLDO happens seamlessly without any

impact on the normal functionality.

www.maximintegrated.com

Maxim Integrated │ 15

MAXM17536

4.5V to 60V, 4A High-Efficiency, DC-DC Step-Down

SiP Power Module with Integrated Inductor

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