ADRF6755ACPZ-R7 datasheet(24/48 Pages) AD

24 / 48 page

ADRF6755

Data Sheet

Rev. B | Page 24 of 48

QUADRATURE MODULATOR

Overview

A basic block diagram of the ADRF6755 quadrature modulator

circuit is shown in Figure 60. The VCO/RFDIVIDER generates

a signal at the 2× LO frequency, which is then divided down to give

a signal at the LO frequency. This signal is then split into in-phase

and quadrature components to provide the LO signals that drive

the mixers.

Figure 60. Block Diagram of the Quadrature Modulator

The I and Q baseband input signals are converted to currents by

the V-to-I stages, which then drive the two mixers. The outputs

of these mixers combine to feed the single-ended output. This

single-ended output is then fed to the attenuator and, finally, to

the external RFOUT signal pin.

Baseband Inputs

The baseband inputs, QBB, QBB, IBB, and IBB, must be driven

from a differential source. The nominal drive level of 0.9 V p-p

differential (450 mV p-p on each pin) should be biased to a

common-mode level of 500 mV dc.

To set the dc bias level at the baseband inputs, refer to Figure 61.

The average output current on each of the AD9779 outputs is

10 mA. A current of 10 mA flowing through each of the 50 Ω

resistors to ground produces the desired dc bias of 500 mV at

each of the baseband inputs.

Figure 61. Establishing DC Bias Level on Baseband Inputs

The differential baseband inputs (QBB, QBB, IBB, and IBB)

consist of the bases of PNP transistors, which present a high

impedance of about 30 kΩ in parallel with approximately 2 pF

of capacitance. The impedance is approximately 30 kΩ below

1 MHz and starts to roll off at higher frequency. A 100 Ω

differential termination is recommended at the baseband inputs,

and this dominates the input impedance as seen by the input

baseband signal. This ensures that the input impedance, as seen by

the input circuit, remains flat across the baseband bandwidth.

See Figure 62 for a typical configuration.

Figure 62. Typical Baseband Input Configuration

The swing of the AD9779 output currents ranges from 0 mA to

20 mA. The ac voltage swing is 1 V p-p single-ended or 2 V p-p

differential with the 50 Ω resistors in place. The 100 Ω differen-

tial termination resistors at the baseband inputs have the effect

of limiting this swing without changing the dc bias condition of

500 mV. The low-pass filter is used to filter the DAC outputs

and remove images when driving a modulator.

Another consideration is that the baseband inputs actually source a

current of 240 μA out of each of the four inputs. This current must

be taken into account when setting up the dc bias of 500 mV. In

the initial example based on Figure 61, an error of 12 mV occurs

due to the 240 μA current flowing through the 50 Ω resistor.

Analog Devices recommends that the accuracy of the dc bias

should be 500 mV ± 25 mV. It is also important that this 240 μA

current have a dc path to ground.

Optimization

The carrier feedthrough and the sideband suppression

performance of the ADRF6755 can be improved over the

specifications in Table 1 by using the following optimization

techniques.

Carrier Feedthrough Nulling

Carrier feedthrough results from dc offsets that occur between

the P and N inputs of each of the differential baseband inputs.

Normally these inputs are set to a dc bias of approximately 500 mV.

However, if a dc offset is introduced between the P and N inputs of

either or both I and Q inputs, the carrier feedthrough is affected

in either a positive or a negative fashion. Note that the dc bias

level remains at 500 mV (average P and N level). The I channel

offset is often held constant while the Q channel offset is varied

until a minimum carrier feedthrough level is obtained. Then,

while retaining the new Q channel offset, the I channel offset is

adjusted until a new minimum is reached. This is usually per-

formed at a single frequency and, thus, is not optimized over

the complete frequency range. Multiple optimizations at different

VCO

RF DIVIDER

V-TO-I

IBB

QBB

RFOUT TO

ATTENUATOR

QUAD

PHASE

SPLITTER

÷2

50Ω

OUT1_P

OUT1_N

OUT2_N

OUT2_P

ADRF6755

CURRENT OUTPUT DAC

(EXAMPLE: AD9779)

IBB

QBB

50Ω

OUT1_P

OUT1_N

OUT2_N

OUT2_P

ADRF6755

CURRENT OUTPUT DAC

(EXAMPLE: AD9779)

IBB

QBB

100Ω

LOW-

PASS

FILTER

100Ω

LOW-

PASS

FILTER

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