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LD57100 датащи(PDF) 11 Page - STMicroelectronics

номер детали LD57100
подробное описание детали  1 A ultra low-dropout LDO with bias
PDF  21 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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LD57100 датащи(HTML) 11 Page - STMicroelectronics

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VOUT = 0.5 V, CIN = 4.7 µF, COUT = 10 µF, CBIAS = 1 µF, trise/fall = 5 µs
Figure 18. Input voltage turn-on (VIN= from 0 V to 0.8 V,
VBIAS=3 V, VEN=0.8 V, IOUT=1 A)
Figure 19. Load transient (VIN=0.8 V, VBIAS=3 V, VEN=1 V,
IOUT from 1 mA to 1 A)
Figure 20. Line transient vs input voltage (VIN= from 0.8 V
to 1.08 V, VBIAS=3 V, VEN=1 V, IOUT 100 mA)
Figure 21. Line transient vs BIAS voltage (VIN=0.8 V to
1.08 V, VBIAS= from 2.8 to 3.8 V, VEN=1 V, IOUT=100 mA)
Figure 22. VBIAS PSRR vs frequency
0
10
20
30
40
50
60
70
80
90
100
0.01
0.10
1.00
10.00
100.00
1,000.00
10,000.00
Frequency(kHz)
Test condition:
Vripple=200mVpkpk
Cout=
10uF MLCC 0603
Headroom=500mV
Vbias=4V, V_EN=1V
Figure 23. VIN PSRR vs frequency
0
10
20
30
40
50
60
70
80
90
100
110
0.01
0.10
1.00
10.00
100.00
1,000.00
10,000.00
Frequency(kHz)
Test condition:
Vripple=200mVpkpk
Cout=
10uF MLCC 0603
Headroom=500mV
Vbias=3V, V_EN=1V
Iload=10mA
LD57100
Typical characteristics
DS13123 - Rev 5
page 11/21



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