VSC8201DL

Rev. 1.6.3 - 9/29/04

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The following figure shows the proposed layout for the local decoupling capacitors. The figure is approximately drawn to scale for stan-

dard 0603 size capacitors. Vias to the power and ground planes immediately in the vicinity of the capacitors provide a low inductive path

and aid in heat dissipation.

Table 2: Power Supply Decoupling for separate 3.3v and 1.5v Power Supplies

PCB Power Plane

Bulk Decoupling required

Local Decoupling Required

V+IO

1 pair of 22uF, 1uF

Four 0.1uF capacitors

V+A33

1 pair of 22uF, 1uF and 1 10uF

Two 0.1 uF capacitors

V+A15

1 pair of 2.2uF, 1uF

One 0.1 uF capacitor

V+DIG

1 pair of 22uF, 1uF

Four 0.1uF capacitors

Table 3: Power Supply Decoupling for single 3.3v Supply and Optional fixed 1.5v Regulator

PCB Power Plane

Bulk Decoupling required

Local Decoupling Required

V+IO

1 pair of 22uF, 1uF

Four 0.1uF capacitors

V+A33

1 pair of 22uF, 1uF and 1 10 uF

Two 0.1uF capacitors

V+A15

1 pair of 2.2uF, 1uF

One 0.1 uF capacitor

V+DIG

2.2uF

Four 0.1uF capacitors

VSC8201

128 LQFP

(Top View)

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Note:Place vias close to or under neath the capacitor pads for

low inductive path and higher heat dissipation rate.

0.1 uF

Figure 1: Local High-Frequency decoupling Capacitor Layout - LQFP package