VSC8201DL

Rev. 1.6.3 - 9/29/04

VITESSE - CONFIDENTIAL & PROPRIETARY - DO NOT COPY WITHOUT PERMISSION

- Page 13 of 21 -

Method II - RGMII Implementation Using the Internal Clock Delay Feature

In this mode the internal clock delay feature is used i.e. MII Register bit 23.8 is set.

Board Layout

Benefits

•

Does not require an external 2.5v supply, thereby reducing system cost.

•

Does not require any additional delays on the TXC and RXC traces.

Drawbacks

•

Needs extra board space for the additional trace delays needed on the TD[3:0] and the TX_CTL traces.

MAC

VSC8201

RD0

RD1

RD2

RD3

RX_CTL

TD3

RXC

700ps of additional trace delay w.r.t TXC

VDDIO=3.0 - 3.6v

VDDIO=3.0 - 3.6v

TD2

TD1

TD0

TX_CTL

TXC