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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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A6986ITR датащи(PDF) 9 Page - STMicroelectronics |
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A6986ITR датащи(HTML) 9 Page - STMicroelectronics |
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9 / 62 page  5 Functional description The iso-buck topology based on the A6986I consists of: • Primary side, the regulation loop of the peak current mode architecture regulates the primary voltage (blue area in the image below) • A two-windings transformer (in grey) • The secondary side, which generates the isolated output voltage (in green) given the selected transformer ratio Figure 4. Iso-buck general schematic 5.1 Primary side The A6986I is based on a “peak current mode”, constant frequency control. The intersection between the error amplifier output and the sensed inductor current generates the PWM control signal to drive the power switch of the primary side, defining so the duty-cycle and regulating the primary output voltage. The device operates in forced PWM control (MLF pin to GND), allowing negative currents to flow in the synchronous MOSFET, hence transferring energy to the secondary coil during the off-time. A6986I Functional description DS13481 - Rev 2 page 9/62 |
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