HTU31D RH/T SENSOR IC

Digital Relative Humidity & Temperature Sensor

REV3 01/2021

Page 12

CRC

CRC Checksum

Basic Considerations

CRC stands for Cyclic Redundancy Check. It is one of the most effective error detection schemes and requires a minimal amount

of resources.

The types of detectable errors with CRC implemented in HTU31D sensors are:

•

Any odd number of errors anywhere in the data transmission

•

All double-bit errors anywhere in the data transmission

•

Any cluster of errors that can be contained within an 8-bit window (1-8 bits incorrect)

•

Most larger clusters of errors

A CRC is an error-detecting code commonly used in digital networks and storage devices to detect accidental changes to raw

data.

Blocks of data entering these systems get a short check value attached, based on the remainder of a polynomial division of their

contents; on retrieval the calculation is repeated, and corrective action can be taken against presumed data corruption if the

check values do not match.

CRCs are so called because the check (data verification) value is a redundancy (it expands the message without adding

information) and the algorithm is based on cyclic codes. CRCs are popular because they are simple to implement in binary

hardware, easy to analyze mathematically, and particularly effective to detect common errors caused by noise in transmission

channels. As the check value has a fixed length, the function that generates it is occasionally used as a hash function.

When HTU31D operates with standard I²C protocol, an 8-bit CRC can be used to detect transmission errors. The CRC covers

all read data transmitted by the sensor. CRC properties for HTU31D communicating with I²C protocol are listed below:

CRC with I²C protocol

Generator polynomial

Initialization

0x00

Protected data

Read data

Final Operation

none

Table 14 I²C CRC Properties

CRC Calculation

To compute a n-bit binary CRC, line bits representing the input in a row, and position the (n+1)-bit pattern representing the

CRC's divisor (called a "polynomial") underneath the left-hand end of the row. This is first padded with zeroes corresponding to

the bit length n of the CRC. If the input bit above the leftmost divisor bit is 0, do nothing. If the input bit above the left most divisor

bit is 1, the divisor is XORed into the input (in other words, the input bit above each 1-bit in the divisor is toggled). The divisor is

then shifted one bit to the right, and the process is repeated until the divisor reaches the right-hand end of the input row. Since

the left most divisor bit zeroed every input bit it touched, when this process ends the only bits in the input row that can be non-

zero are the n bits at the right-hand end of the row. These n bits are the remainder of the division step and will also be the value

of the CRC function. The validity of a received message can easily be verified by performing the above calculation again, this

time with the check value added instead of zeroes. The remainder should equal zero if there are no detectable errors.

CRC Examples

The input message 11011100 (0xDC) will have as result 01111001 (0x79).

The input message 01101000 00111010 (0x683A) will have as result 01111100 (0x7C).

The input message 01001110 10000101 (0x4E85) will have as result 01101011 (0x6B).