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MAX17843ACBV датащи(PDF) 20 Page - Maxim Integrated Products |
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MAX17843ACBV датащи(HTML) 20 Page - Maxim Integrated Products |
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20 / 131 page ![]() (VDCIN = +48V, TA = TMIN to TMAX, unless otherwise noted, where TMIN = -40°C and TMAX =+125°C. Typical values are at TA = +25°C. Operation is with the recommended application circuit.) (Note 5) Note 5: Unless otherwise noted, limits are 100% production tested at TA = +25°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. Note 6: Acquisition mode (ADC conversions) is entered when the SCAN bit is set and ends when SCANDONE is set. With the typical acquisition duty-cycle very low, the average current (IDCIN) is much less than IDCMEAS. Total supply current during communication: IDCIN = IDCCOMM + IDCSTBY. Note 7: Range over which measurement settling time and accuracy is guaranteed. Note 8: VCELLn = VCn - VCn-1, VCELLn = VCELLn-1, and VDCIN = 12 x │VCELLn │ (9V min). Note 9: Guaranteed by design and not production tested. Note 10: As measured during specified diagnostic mode; 5V full-scale for unipolar mode measurements and 2.5V full-scale for bipolar measurements. Note 11: ISHDNL measured with VSHDNL = 0.3V, STOP characters, zero idle time, VRX_PEAK = 3.3V. Note 12: Charge pump efficiency = δILOAD/δISUPPLY, where ILOAD is applied from HV to AGND, δILOAD = 5mA, and δISUPPLY = IDCIN (for ILOAD = 5mA) - IDCIN (for ILOAD = 0). Note 13: Differential signal (VRXP - VRXN) where VRXP and VRXN do not exceed a common-mode voltage range of ±25V. Note 14: In daisy-chain applications, the bit time of the second STOP bit may be less than specified to account for clock-rate variation and sampling error between devices. Note 15: Maximum limited by application circuit. Note 16: Fall time measured 90% to 10%; rise time measured 10% to 90%. Note 17: VDDL = VDDL2 for lower port; VDDL = VDDL3 for upper port. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS RX Minimum Idle Time (STOP bit to START bit) (Notes 9, 15) tRXIDLESPST 1 tBIT RX Fall Time (Notes 9, 16) tFALL 0.5 tBIT RX Rise Time (Notes 9, 16) tRISE 0.5 tBIT Propagation Delay (RX Port to TX port) (Note 9) tPROP 2.5 3 tBIT Startup Time from SHNDL High and VAA = 0V to RXUP/RXUN Valid tSTARTUP 1 ms MAX17843 12-Channel, High-Voltage Smart Sensor Data-Acquisition Interface www.maximintegrated.com Maxim Integrated │ 20 Electrical Characteristics (continued) |
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