MAX17823B datasheet(40/121 Pages) MAXIM

40 / 121 page

________________________________________________________________________________________________________________________________________________________________

MAX17823B

12-Channel High-Voltage Data Acquisition System

www.maximintegrated.com

Maxim Integrated | 40

Shutdown Mode

Shutdown is performed by bringing VSHDNL < 0.6V. Table 18 summarizes the methods by which this can be achieved.

Table 18. Shutdown Timing

Shutdown Method

RPULLDOWN

CSHDNL

1. Host drives SHDNL pin low

1kΩ

External

1nF

1µs

2. Host sets FORCEPOR bit

5kΩ

Internal

5µs

3. Disconnect DCIN

200kΩ

External

200µs

4. Host places UART in idle mode

10MΩ

Internal

10,000µs

The quickest shutdown can be achieved by driving SHDNL externally with a driver pull-down impedance not

exceeding 1kΩ. If SHDNL is not driven externally, the host can discharge CSHDNL under software control by setting

the FORCEPOR bit. This will enable a pull-down (4.7kΩ nominal) to discharge the capacitor with a 4.7µs time

constant.

The slowest method is for the host to simply cease communication. With the UART idle, there is no charge pumping

and the capacitor discharges through an internal 10MΩ resistor with a 10ms time constant. If shutdown faster than

10ms is desired when power is disconnected from the device, a 200kΩ resistor may be connected externally from

SHDNL to AGND to create a 200µs time constant.

If only a reset is required, the host can issue a soft reset by setting the SPOR bit. This will reset the device registers

and disable high-voltage operation but low-voltage operation remains enabled (the regulator is not disabled).

Note: For single-ended communication, SHDNL must be driven externally since the charge pump operation requires

a differential signal.

Shutdown Sequence

The shutdown sequence and timing is shown in Figures 21–23. The ALRTSHDNL status bit will be set and the low-

voltage regulator is disabled as soon as VSHNDL < 0.6V. When the VAA and VDDL decoupling capacitors discharge

below the POR threshold (2.95V typical) then the device registers are reset and the HV charge pump is disabled.

The device is then in an ultra-low-power state until VSHDNL > 1.8V.

POR Active

VAA >

VPOR_RISING

POR Inactive

Check VAA

Oscillator, Charge

Pump, Digital

Logic Disabled

VAA <

VPOR_FALLING

Figure 21. Shutdown Sequence

MAX17823B датащи(PDF) 40 Page - Maxim Integrated Products

MAX17823B датащи(HTML) 40 Page - Maxim Integrated Products

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL