DSPIC30F2011 datasheet(115/207 Pages) MICROCHIP

115 / 207 page

Preliminary

DS70139C-page 113

dsPIC30F2011/2012/3012/3013

FIGURE 16-3:

A/D OUTPUT DATA FORMATS

16.12 Configuring Analog Port Pins

The use of the ADPCFG and TRIS registers control the

operation of the A/D port pins. The port pins that are

desired as analog inputs must have their correspond-

ing TRIS bit set (input). If the TRIS bit is cleared (out-

put), the digital output level (VOH or VOL) will be

converted.

The A/D operation is independent of the state of the

CH0SA<3:0>/CH0SB<3:0> bits and the TRIS bits.

When reading the Port register, all pins configured as

analog input channels will read as cleared.

Pins configured as digital inputs will not convert an ana-

log input. Analog levels on any pin that is defined as a

digital input (including the ANx pins) may cause the

input buffer to consume current that exceeds the

device specifications.

16.13 Connection Considerations

The analog inputs have diodes to VDD and VSS as ESD

protection. This requires that the analog input be

between VDD and VSS. If the input voltage exceeds this

range by greater than 0.3V (either direction), one of the

diodes becomes forward biased and it may damage the

device if the input current specification is exceeded.

An external RC filter is sometimes added for anti-

aliasing of the input signal. The R component should be

selected to ensure that the sampling time requirements

are satisfied. Any external components connected (via

high impedance) to an analog input pin (capacitor,

zener diode, etc.) should have very little leakage

current at the pin.

RAM Contents:

d11 d10 d09 d08 d07 d06 d05 d04 d03 d02 d01 d00

Read to Bus:

Signed Fractional

d11 d10 d09 d08 d07 d06 d05 d04 d03 d02 d01 d00

0000

Fractional

d11 d10 d09 d08 d07 d06 d05 d04 d03 d02 d01 d00

0000

Signed Integer

d11 d11 d11 d11 d11 d10 d09 d08 d07 d06 d05 d04 d03 d02 d01 d00

Integer

0000

d11 d10 d09 d08 d07 d06 d05 d04 d03 d02 d01 d00

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