AD6688 datasheet(2/138 Pages) AD

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AD6688

Data Sheet

Rev. 0 | Page 2 of 138

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 3

General Description ......................................................................... 4

Product Highlights ........................................................................... 4

Specifications..................................................................................... 5

DC Specifications ......................................................................... 5

AC Specifications.......................................................................... 7

Digital Specifications ................................................................... 9

Switching Specifications ............................................................ 10

Timing Specifications ................................................................ 11

Absolute Maximum Ratings.......................................................... 12

Thermal Resistance .................................................................... 12

ESD Caution................................................................................ 12

Pin Configuration and Function Descriptions........................... 13

Typical Performance Characteristics ........................................... 16

Equivalent Circuits......................................................................... 21

Theory of Operation ...................................................................... 25

ADC Architecture ...................................................................... 25

Analog Input Considerations.................................................... 25

Voltage Reference ....................................................................... 29

DC Offset Calibration................................................................ 30

Clock Input Considerations...................................................... 30

Power-Down/Standby Mode..................................................... 32

Temperature Diode .................................................................... 32

ADC Overrange and Fast Detect.................................................. 34

ADC Overrange.......................................................................... 34

Fast Threshold Detection (FD_A and FD_B) ........................ 34

ADC Application Modes and JESD204B Tx Converter

Mapping ........................................................................................... 35

Programmable FIR Filters ............................................................. 37

Supported Modes........................................................................ 37

Programming Instructions........................................................ 40

Digital Downconverter (DDC)..................................................... 42

DDC I/Q Input Selection .......................................................... 42

DDC I/Q Output Selection ....................................................... 42

DDC General Description ........................................................ 42

DDC Frequency Translation..................................................... 45

DDC Decimation Filters............................................................ 53

DDC Gain Stage ......................................................................... 59

DDC Complex to Real Conversion ......................................... 59

DDC Mixed Decimation Settings ............................................ 60

DDC Example Configurations ................................................. 62

DDC Power Consumption........................................................ 65

Signal Monitor ................................................................................ 66

SPORT Over JESD204B ............................................................ 67

Digital Outputs ............................................................................... 69

Introduction to the JESD204B Interface ................................. 69

JESD204B Overview .................................................................. 69

Functional Overview ................................................................. 70

JESD204B Link Establishment ................................................. 70

Physical Layer (Driver) Outputs .............................................. 72

fS × 4 Mode................................................................................... 72

Setting Up the AD6688 Digital Interface................................ 74

Deterministic Latency.................................................................... 79

Subclass 0 Operation.................................................................. 79

Subclass 1 Operation.................................................................. 79

Multichip Synchronization............................................................ 81

Normal Mode.............................................................................. 81

Timestamp Mode ....................................................................... 81

SYSREF Input.............................................................................. 82

SYSREF± Setup/Hold Window Monitor................................. 85

Latency............................................................................................. 87

End to End Total Latency.......................................................... 87

Example Latency Calculations.................................................. 87

LMFC-Referenced Latency....................................................... 87

Test Modes....................................................................................... 89

ADC Test Modes ........................................................................ 89

JESD204B Block Test Modes .................................................... 90

Serial Port Interface........................................................................ 92

Configuration Using the SPI..................................................... 92

Hardware Interface..................................................................... 92

SPI Accessible Features.............................................................. 92

Memory Map .................................................................................. 93

Reading the Memory Map Register Table............................... 93

Memory Map Register Details.................................................. 94

Applications Information ............................................................ 136

Power Supply Recommendations........................................... 136

Layout GuideLines ................................................................... 137

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