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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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VR4102 датащи(PDF) 149 Page - NEC |
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VR4102 датащи(HTML) 149 Page - NEC |
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149 / 701 page  CHAPTER 5 MEMORY MANAGEMENT SYSTEM 149 5.5.5 Processor Revision Identifier (PRId) Register (15) The 32-bit, read-only Processor Revision Identifier (PRId) register contains information identifying the implementation and revision level of the CPU and CP0. Figure 5-16 shows the format of the PRId register. Figure 5-16. PRId Register 15 16 7 8 0 31 0 Imp Rev 16 8 8 Imp : CPU core processor ID number (0x0C for the VR4102) Rev : CPU core processor revision number 0 : Reserved for future use. Write 0 in a write operation. When this field is read, 0 is read. The processor revision number is stored as a value in the form y.x, where y is a major revision number in bits 7 to 4 and x is a minor revision number in bits 3 to 0. The processor revision number can distinguish some CPU core revisions, however there is no guarantee that changes to the CPU core will necessarily be reflected in the PRId register, or that changes to the revision number necessarily reflect real CPU core changes. Therefore, create a program that does not depend on the processor revision number area. |
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