Rev 1.0

07/02/19

High Speed CMOS Logic – 54HC373

Test Circuits

Page 7 of 7

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DUT

OUTPUT

TEST POINT

* Includes all probe and jig capacitance

Figure 5

TESTING

CONNECT TO GND WHEN

TESTING

DUT

OUTPUT

TEST POINT

* Includes all probe and jig capacitance

1kΩ

Figure 6