FTD1601

2021. 03. 15

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Revision No : 0

output voltage. Ceramic, tantalum, or low ESR electroly�c

capacitors are recommended. Under typical applica�on

condi�ons, a minimum ceramic capacitor value of 20µF is

recommended on the output. Low ESR capacitors are

preferred to keep the output voltage ripple low. The output

voltage ripple can be es�mated by:

Where C2 is the output capacitance value and RESR is the

equivalent series resistance (ESR) value of the output

capacitor.

When using ceramic capacitors, the impedance at the

switching frequency is dominated by the capacitance which

is the main cause for the output voltage ripple. For

simplifica�on, the output voltage ripple can be es�mated

by:

∆V = V

8×f ×L×C2×(1−VV )

When using tantalum or electroly�c capacitors. The ESR

dominates the impedance at the switching frequency. For

simplifica�on, the output ripple can be approximated to:

∆V =Vf×L×(1−VV )×R

The characteris�cs of the output capacitor also affect the

stability of the regula�on system. The FTD1601 can be

op�mized for a wide range of capacitance and ESR values.

Layout Consideration

1. Input MLCC capacitor is strongly recommended to added

and should be connected to the VIN pin and the GND pin as

close as possible.

2. Keep sensi�ve signal traces such as trace connec�ng FB

pin away from the VOUT pins.

3. Make the current trace from SW pin to inductor to the

GND as short as possible.

4. Pour a maximized copper area to the GND pin and the VIN

pin to help thermal dissipa�on.