PH4530L datasheet(5/12 Pages) PHILIPS

5 / 12 page

9397 750 14031

Product data sheet

Rev. 02 — 26 January 2005

5 of 12

Philips Semiconductors

PH4530L

N-channel TrenchMOS™ logic level FET

Characteristics

Table 5:

Characteristics

Tj =25 °C unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Static characteristics

V(BR)DSS

drain-source breakdown voltage

ID = 250 µA; VGS = 0 V

--V

VGS(th)

gate-source threshold voltage

ID = 1 mA; VDS =VGS; Figure 9

1.5

IDSS

drain-source leakage current

VDS =30V; VGS =0V

Tj =25 °C

0.06

µA

Tj = 150 °C

500

µA

IGSS

gate-source leakage current

VGS = ±15 V; VDS = 0 V

100

RDSon

drain-source on-state resistance

VGS = 10 V; ID =15A; Figure 7 and 8

Tj =25 °C

4.8

5.7

Ω

Tj = 150 °C

8.2

9.7

Ω

VGS =5V; ID =15A; Figure 7 and 8

5.8

7.2

Ω

Dynamic characteristics

Qg(tot)

total gate charge

ID = 25 A; VDS =10V; VGS =5V;

Figure 13

23.5

Qgs

gate-source charge

5.8

Qgd

gate-drain (Miller) charge

6.5

Ciss

input capacitance

VGS =0V; VDS = 10 V; f = 1 MHz;

Figure 11

-1972

-pF

Coss

output capacitance

769

Crss

reverse transfer capacitance

304

td(on)

turn-on delay time

VDS =10V; ID = 25 A;

VGS =5V; RG = 4.7 Ω

-22

rise time

-40

td(off)

turn-off delay time

fall time

-18

Source-drain diode

VSD

source-drain (diode forward) voltage IS = 15 A; VGS =0V; Figure 12

0.85

1.2

trr

reverse recovery time

IS = 20 A; dIS/dt = −100 A/µs; VGS =0V

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