IMXRT1024IEC datasheet(2/90 Pages) NXP

2 / 90 page

i.MX RT1024 Crossover Processors Data Sheet for Industrial Products, Rev. 0, 11/2020

NXP Semiconductors

i.MX RT1024 introduction

The i.MX RT1024 is specifically useful for applications such as:

•

Industrial

•

Motor Control

•

Home Appliance

•IoT

1.1

Features

The i.MX RT1024 processors are based on Arm Cortex-M7 Core Platform, which has the following

features:

•

Supports single Arm Cortex-M7 with:

— 16 KB L1 Instruction Cache

— 16 KB L1 Data Cache

— Full featured Floating Point Unit (FPU) with support of the VFPv5 architecture

— Support the Armv7-M Thumb instruction set

•

Integrated MPU, up to 16 individual protection regions

•

Up to 256 KB I-TCM and D-TCM in total

•

Frequency of 396 MHz

•

Cortex M7 CoreSight™ components integration for debug

•

Frequency of the core, as per Table 11, "Operating ranges," on page 19.

The SoC-level memory system consists of the following additional components:

— Boot ROM (96 KB)

— On-chip Flash (4 MB)

— On-chip RAM (256 KB)

– Configurable RAM size up to 256 KB shared with CM7 TCM

•

External memory interfaces:

— 8/16-bit SDRAM, up to SDRAM-133

— 8/16-bit SLC NAND FLASH, with ECC handled in software

—SD/eMMC

— SPI NOR FLASH

— Parallel NOR FLASH with XIP support

— Single/Dual channel Quad SPI FLASH with XIP support

•

Timers and PWMs:

— Two General Programmable Timers

– 4-channel generic 32-bit resolution timer

– Each support standard capture and compare operation

— Four Periodical Interrupt Timers

– Generic 32-bit resolution timer

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