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28348-DSH-001-B
Mindspeed Technologies™
1
-29
CX28342/3/4/6/8 Data Sheet
Product Description
RXCKI1
J18
J18
I
Framers 1
Receive Dejittered
Clock In
Used to read the received data
out of the internal clock dejitter
FIFO buffer (if unused, tie to
ground).
RXCKI2
G19
G19
I
Framers 2
Receive Dejittered
Clock In
RXCKI3
D20
D20
I
Framers 3
Receive Dejittered
Clock In
RXCKI4
D18
D18
I
Framers 4
Receive Dejittered
Clock In
RXCKI5
M3
M3
I
Framers 5
Receive Dejittered
Clock In
RXCKI6
P2
P2
I
Framers 6
Receive Dejittered
Clock In
RXCKI7
—
U1
I
Framers 7
Receive Dejittered
Clock In
RXCKI8
—
U3
I
Framers 8
Receive Dejittered
Clock In
VCO1
N20
N20
O/Z
Framers 1
Phase Detector Output
Used as the phase detector for
the clock recovery circuit that
generates dejittered clock,
RXCKI. Valid only when framer
dejitter FIFO buffer is enabled.
VCO2
A18
A18
O/Z
Framers 2
Phase Detector Output
VCO3
M20
M20
O/Z
Framers 3
Phase Detector Output
VCO4
B17
B17
O/Z
Framers 4
Phase Detector Output
VCO5
H1
H1
O/Z
Framers 5
Phase Detector Output
VCO6
Y3
Y3
O/Z
Framers 6
Phase Detector Output
VCO7
—
J1
O/Z
Framers 7
Phase Detector Output
VCO8
—
W4
O/Z
Framers 8
Phase Detector Output
Table 1-14. Receiver Section Line Side (3 of 3)
Pin Label
CX28346 Pin #
CX28348 Pin #
I/O
Signal Name
Definition
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