LT8697 datasheet(32/40 Pages) AD

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LT8698S/LT8698S-1

Rev. A

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to D–. This state allows compatible devices to draw 2.1A

of charge current.

Select State 26 accesses the 1.0A vendor charger profile.

This mode of operation connects a 2.0V resistive divider

from VBUS to D+ and a 2.7V resistive divider from VBUS

D–. This state allows compatible devices to draw 1.0A of

charge current.

For charger modes of operation (select states 21, 22, 24,

25 and 26), STATUS high indicates IBUS load >120mA and

STATUS low indicates IBUS load <100mA.

VBUS Only Modes of Operation

The LT8698S implements several modes of operation that

manipulate VBUS but leave the datalines switches open

and do not tie any resistor termination to the datalines.

Select states 12, 13 and 14 activate various versions of

the VBUS only modes. What is common to these states

is that the dataline switches are open. These VBUS only

modes differ by allowing the user to power VBUS, not

power VBUS or discharge VBUS. See Table 6.

For the VBUS only modes of operation with VBUS in regu-

lation (select state 13), STATUS high indicates IBUS load

>120mA and STATUS low indicates IBUS load <100mA.

For VBUS only mode of operation with VBUS disabled

(select state 12), STATUS high indicates VBUS < 0.5V and

STATUS low indicates VBUS > 0.85V. For VBUS only mode

of operation with VBUS being discharged (select state 14),

the STATUS pin indicates the discharge state. Refer to the

Bus Reset Modes of Operation section for more details.

Bus Reset Modes of Operation

The LT8698S implements several modes of operation that

discharge VBUS. Select states 5, 11, 14 and 20 activate

various versions of this VBUS reset mode. What is com-

mon to these states is that the switcher stops delivering

power to the VBUS output, a 9mA current sink is tied from

BUS/ISN to GND for 400ms, and the FLT pin can indicate

an unsuccessful discharge for 4.2ms at the end of the

discharge cycle. These VBUS reset modes differ by tying

various resistor terminations to the datalines or by open-

ing or closing the dataline switches. See Table 6.

APPLICATIONS INFORMATION

To initiate a bus reset sequence, normally the LT8698S

is in a state with VBUS powered up. The select pin's input

state is then changed to the desired BUS reset mode.

Within 1.5ms, switching stops and the LT8698S stops

delivering power to the VBUS output. Also, a 9mA current

sink is connected from BUS/ISN to GND. The LT8698S

will also start to oscillate the STATUS pin with a 9ms

period to indicate a bus reset sequence in progress. While

the STATUS pin oscillates, the select pins are locked out

from changing the LT8698S state.

The LT8698S discharges VBUS with the 9mA current

sink for 400ms. After 400ms, the LT8698S turns off the

current sink and measures the resultant VBUS voltage

for 120ms. If VBUS is < 0.5V for 120ms, the discharge

sequence is completed successfully. If VBUS is > 0.85V at

any point during this 120ms time, the discharge sequence

is completed unsuccessfully.

When the discharge sequence is complete, the STATUS

pin stops oscillating and pulls high, indicating that the

bus reset is done and that the select pins are no longer

locked out. If the bus reset was completed successfully,

the FLT pin does not change state. If the bus reset was not

completed successfully, the FLT pin pulls low for 4.2ms.

Refer to Figure 15 and Figure 16 for a timing diagram of

unsuccessful and successful BUS reset sequences.

VBUS Off Modes of Operations

The LT8698S is compatible with the USB On-The-Go

(OTG) and Embedded Host 2.0 Specification. This speci-

fication allows hosts and peripheral devices to exchange

roles. This role exchange means that VBUS may be driven

by the peripheral device on the B side of the USB con-

nection. The LT8698S offers VBUS off modes of operation

with a high input resistance on VBUS that allow a portable

device to drive VBUS. The LT8698S does not support the

Attach Detect Protocol (ADP) on the A side, but as a piece

of the A side device the LT8698S is compatible with ADP

on the B side.

Select state 3, 9, 12 and 18 activate various versions of

the LT8698S VBUS off modes. What is common to these

states is that switching is disabled and that the VBUS

input resistance is > 10kΩ. The VBUS off modes differ by

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