LTC4355 datasheet(13/24 Pages) AD

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LT4356-3

Rev D

For more information www.analog.com

APPLICATIONS INFORMATION

MOSFET stress is the result of power dissipated within

the device. For long duration surges of 100ms or more,

stress is increasingly dominated by heat transfer; this is

a matter of device packaging and mounting, and heat sink

thermal mass. This is analyzed by simulation, using the

MOSFET thermal model.

For short duration transients of less than 100ms, MOSFET

survival is increasingly a matter of safe operating area

(SOA), an intrinsic property of the MOSFET. SOA quanti-

fies the time required at any given condition of VDS and

ID to raise the junction temperature of the MOSFET to its

rated maximum. MOSFET SOA is expressed in units of

watt-squared-seconds(P2t).Thisfigureisessentiallycon-

stant for intervals of less than 100ms for any given device

type, and rises to infinity under DC operating conditions.

Destruction mechanisms other than bulk die temperature

distort the lines of an accurately drawn SOA graph so that

P2t is not the same for all combinations of ID and VDS.

In particular P2t tends to degrade as VDS approaches the

maximum rating, rendering some devices useless for

absorbing energy above a certain voltage.

Calculating Transient Stress

To select a MOSFET suitable for any given application, the

SOA stress must be calculated for each input transient

whichshallnotinterruptoperation.Itisthenasimplematter

to chose a device which has adequate SOA to survive the

maximumcalculatedstress.P2tforaprototypicaltransient

waveform is calculated as follows (Figure 4).

Let

a = VREG – VIN

b = VPK – VIN

(VIN = Nominal Input Voltage)

Then

P2t =ILOAD2

(b a)3

2a2 ln b

+ 3a2 +b2 4ab

Typically VREG ≈ VIN and t >> tr simplifying the above to

P2t = 1

ILOAD2 (VPK – VREG)2 τ

(W2s)

For the transient conditions of VPK = 80V, VIN = 12V, VREG

= 16V, tr = 10µs and t = 1ms, and a load current of 3A,

P2t is 18.4W2s—easily handled by a MOSFET in a D-pak

package.TheP2tofothertransientwaveshapesisevaluated

by integrating the square of MOSFET power versus time.

Calculating Short-Circuit Stress

SOA stress must also be calculated for short-circuit condi-

tions. Short-circuit P2t is given by:

P2t = (VIN • ΔVSNS/RSNS)2 • tTMR

(W2s)

where, ΔVSNS is the SENSE pin threshold, and tTMR is the

overcurrent timer interval.

For VIN = 14.7V, VSNS = 50mV, RSNS = 12mΩ and CTMR

= 100nF, P2t is 6.6W2s—less than the transient SOA

calculated in the previous example. Nevertheless, to

accountforcircuittolerancesthisfigureshouldbedoubled

to 13.2W2s.

Limiting Inrush Current and GATE Pin Compensation

The LT4356-3 limits the inrush current to any load capaci-

tance by controlling the GATE pin voltage slew rate. An

external capacitor can be connected from GATE to ground

to slow down the inrush current further at the expense of

slower turn-off time. The gate capacitor is set at:

C1 =

IGATE(UP)

IINRUSH

•CL

Figure 4. Safe Operating Area Required to Survive Prototypical

Transient Waveform

VPK

VIN

43563 F04

VREG

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