4

Rev 3 Aug 8, 2020

first. Note the timing diagram below.

Note

– The F1950 includes a CLK inhibit feature designed to minimize sensitivity to CLK bus noise when the device is

When the device is powered up it will default to the Maximum Attenuation setting as described below:

Note that for the F1950 in all cases (High or 1) = Attenuation Stepped IN. (0 or Low) = Attenuation Stepped OUT.

Interval

Symbol

Description

Min

Spec

Max

Spec

Units

A

Parallel to Serial Setup Time

100

ns

B

Serial Data Hold Time

10

ns

C

LE delay from final serial clock rising edge

10

ns

Data Word 8 bits

D0

D1

D5

D2

D4

D3

0.5 dB

CLK

DATA

Data Word

Latched into

Active Register

LSB

D7

0.25 dB

1

2

3

4

5

6

7

8

9

1 dB

2 dB

4 dB

8 dB

16 dB

MSB

X

D6

RSV

LE

Spec

Interval

A

B

C

Time

Default Register Settings

1

0

1

1

1

1

1

1

D7

D6

D2

D5

D3

D4

RSV

D0

MSB

D1

LSB