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STPMIC1DPQR датащи(PDF) 125 Page - STMicroelectronics

номер детали STPMIC1DPQR
подробное описание детали  Highly integrated power management IC for micro processor units
PDF  140 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STPMIC1DPQR датащи(HTML) 125 Page - STMicroelectronics

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6.7.8
NVM device address shadow register (I2C_ADDR_SHR)
Table 72. NVM_I2C_ADDR_AHR
7
6
5
4
3
2
1
0
reserved
I2C_ADDR[6:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address: 0xFF
Type: read write register
Default: depends on part number refer to Table 64. NVM shadow register map
Description: NVM device address shadow register.
[7]
Reserved
[6:0]
I2C_ADDR[6:0]: I2C device address.
Warning: applied immediately, next access should use new address
STPMIC1
NVM shadow registers
DS12792 - Rev 7
page 125/140



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