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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32MP157C датащи(PDF) 157 Page - STMicroelectronics |
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STM32MP157C датащи(HTML) 157 Page - STMicroelectronics |
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157 / 260 page  DS12505 Rev 5 157/260 STM32MP157C/F Electrical characteristics 238 PLL1_1600, PLL2_1600 characteristics Table 39. PLL1_1600, PLL2_1600 characteristics(1) Symbol Parameter Conditions Min Typ Max Unit fPLL_IN PLL input clock Normal mode and Sigma delta mode 8 - 16 MHz PLL input clock duty cycle -10 - 90 % fPLL_P_Q_R_ OUT PLL P,Q,R multiplier output clock - 3.125 - 800(2) MHz PLL P,Q,R clock duty cycle Division by 1 45 50 55 % Even divisions (N multiple of 2) 45 50 55 Odd divisions (N not multiple of 2) [100, (N+1)/ 2N] - 5 [100, (N+1)/ 2N] [100, (N+1)/ 2N] + 5 fVCO_OUT PLL VCO output - 800 - 1600 MHz tLOCK PLL lock time Normal mode - 50 150 µs Sigma-delta mode (CKIN ≥ 8 MHz) - 65 170 ALOCK Lock Accuracy (Ratio VCO frequency versus target frequency at lock) -- - ±2 % |
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