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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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L6986H датащи(PDF) 46 Page - STMicroelectronics |
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L6986H датащи(HTML) 46 Page - STMicroelectronics |
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46 / 68 page  In the SLAVE mode the L6986H sets the internal oscillator at 250 kHz typ. (see Table 2) and drives the line accordingly. Figure 49. L6986H synchronization driving capability In order to safely guarantee that each regulator recognizes itself in SLAVE mode when synchronized, the external master must drive the SYNCH pin with a clock signal frequency higher than the maximum oscillator spread of the selected line in Table 2 for at least 10 internal clock cycles. Once recognized as SLAVE the synchronization range is: • 275 - 1.4 MHz if fSW < 500 kHz • 475 kHz - 2.2 MHz if fSW >=500 kHz example 1: selecting RFSW = 0 Ω to VCC Table 13. Example of oscillator frequency selection Symbol RVCC (E24 series) RGND (E24 series) fSW min. fSW typ. fSW max. fSW NC 0 Ω 225 250 275 the device enters in slave mode after 10 pulses at frequency higher than 275 kHz and so it is able to synchronize to a clock signal in the range 275 kHz - 1.4 MHz (see Figure 48. Synchronization pulse definition). Example 2: selecting RFSW = 0 Ω to GND Table 14. Example of oscillator frequency selection (2) Symbol RVCC (E24 series) RGND (E24 series) fSW min. fSW typ. fSW max. fSW NC 0 Ω 450 500 550 The device enters in slave mode after 10 pulses at frequency higher than 550 kHz and so it is able to synchronize to a clock signal in the range 475 kHz - 2.2 MHz (see Figure 48. Synchronization pulse definition). L6986H Synchronization (LNM) DS12905 - Rev 2 page 46/68 |
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