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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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R5F52106ADFN датащи(PDF) 97 Page - Renesas Technology Corp |
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R5F52106ADFN датащи(HTML) 97 Page - Renesas Technology Corp |
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97 / 223 page  R01DS0041EJ0150 Rev.1.50 Page 97 of 221 Oct 18, 2013 RX210 Group 5. Electrical Characteristics [Chip version C] Note 1. Supply current values do not include output charge/discharge current from all pins. The values apply when internal pull-up MOSs are in the off state. Note 2. Clock supply to the peripheral functions is stopped. This does not include BGO operation. The clock source is PLL and the VCO oscillation frequency is 100 MHz. BCLK, FCLK, and PCLK are set to divided by 64. Note 3. Clocks are supplied to the peripheral functions. This does not include BGO operation. The clock source is PLL and the VCO oscillation frequency is 100 MHz. BCLK, FCLK, and PCLK are ICLK divided by 2. Note 4. This is the increase if data is programmed to or erasing from the ROM or E2 DataFlash during program execution. Table 5.9 DC Characteristics (8) Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL = VREFL0 = 0 V, Ta = –40 to +105°C Item Symbol Typ. Max. Unit Test Conditions Supply current*1 High-speed operating mode Normal operating mode No peripheral operation*2 ICLK = 50 MHz ICC 10 — mA All peripheral operation: Normal*3 ICLK = 50 MHz 31.5 — All peripheral operation: Max.*3 ICLK = 50 MHz — 55 Sleep mode No peripheral operation ICLK = 50 MHz 7.5 — All peripheral operation: Normal ICLK = 50 MHz 17.5 — All-module clock stop mode ICLK = 50 MHz 6.7 — Increase during BGO operation*4 25 — |
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