XRT86L30 datasheet(21/284 Pages) EXAR

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XRT86L30

SINGLE T1/E1/J1 FRAMER/LIU COMBO

PRELIMINARY

REV. P1.0.1

RxSER

Receive Serial Data Output

This output pin along with RxSERCLK functions as the Receive Serial Output.

DS1/E1 mode

Any incoming T1/E1 line data that is received from the line will be decoded and

output via this pin. The framer can use either the rising edge or the falling edge

of RxSERCLK to update the received T1/E1 payload data.

Framer Bypass Mode:

In framer bypass mode, RxSER is used for the positive digital output pin to the

LIU.

RxCHN_0/

RxSig

Receive Time Slot Octet Identifier Output-Bit 0

These output signals (RxCHN4_n through RxCHN0_n) reflect the five-bit binary

value of the number of Time Slot being received and output to the Terminal

Equipment via the Receive Payload Data Output Interface. The Terminal Equip-

ment can use RxCHCLK to sample these five output pins in order to identify the

time slot being processed.

Receive Serial Signaling Output

These pins can be used to output robbed-bit signaling (DS1) or CAS signaling

(E1) extracted from an incoming DS1/E1 frame.

RxCHN_1/

RxFrTD

Receive Time Slot Octet Identifier Output-Bit 1

These output signals (RxCHN4_n through RxCHN0_n) reflect the five-bit binary

value of the number of Time Slot being received and output to the Terminal

Equipment via the Receive Payload Data Output Interface. The Terminal Equip-

ment can use RxCHCLK to sample these five output pins in order to identify the

time slot being processed.

Receive Serial Fractional DS1/E1 Output

These pins can be used to output fractional DS1/E1 payload data within an

inbound DS1/E1 frame. In this mode, terminal equipment will use either RxCH-

CLK or RxSERCLK to clock out fractional DS1/E1 payload data.

RxCHN_2/

RxCHN

Receive Time Slot Octet Identifier Output-Bit 2

These output signals (RxCHN4_n through RxCHN0_n) reflect the five-bit binary

value of the number of Time Slot being received and output to the Terminal

Equipment via the Receive Payload Data Output Interface. The Terminal Equip-

ment can use RxCHCLK to sample these five output pins in order to identify the

time slot being processed.

Receive Time Slot Identifier Serial Output

If RxCHN1 is configured as RxFrTD to output fractional DS1/E1 payload data,

then these pins serially output the five-bit binary value of the number of the Time

Slot being accepted and processed by the Transmit Payload Data Input Inter-

face.

RxCHN_3/

Rx8KHZ

Receive Time Slot Octet Identifier Output-Bit 3

These output signals (RxCHN4_n through RxCHN0_n) reflect the five-bit binary

value of the number of Time Slot being received and output to the Terminal

Equipment via the Receive Payload Data Output Interface. The Terminal Equip-

ment can use RxCHCLK to sample these five output pins in order to identify the

time slot being processed.

Receive 8KHz Clock Output

These pins can output a reference 8KHz clock signal if configured accordingly.

RECEIVE SERIAL DATA OUTPUT

SIGNAL NAME

PIN #TYPE

DESCRIPTION

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