74LS12 datasheet(3/12 Pages) ONSEMI

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SN74LS122 SN74LS123

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LS122 FUNCTIONAL TABLE

INPUTS

OUTPUTS

CLEAR

↑

↓

↑

LS123 FUNCTIONAL TABLE

INPUTS

OUTPUTS

CLEAR

↑

↓

↑

TYPICAL APPLICATION DATA

The output pulse tW is a function of the external

components, Cext and Rext or Cext and Rint on the LS122.

For values of Cext ≥ 1000 pF, the output pulse at VCC = 5.0

V and VRC = 5.0 V (see Figures 1, 2, and 3) is given by

tW = K Rext Cext where K is nominally 0.45

If Cext is on pF and Rext is in kΩ then tW is in nanoseconds.

The Cext terminal of the LS122 and LS123 is an internal

connection to ground, however for the best system

performance Cext should be hard-wired to ground.

Care should be taken to keep Rext and Cext as close to the

monostable as possible with a minimum amount of

inductance between the Rext/Cext junction and the Rext/Cext

pin. Good groundplane and adequate bypassing should be

designed into the system for optimum performance to ensure

that no false triggering occurs.

It should be noted that the Cext pin is internally connected

to ground on the LS122 and LS123, but not on the LS221.

Therefore, if Cext is hard-wired externally to ground,

substitution of a LS221 onto a LS123 socket will cause the

LS221 to become non-functional.

The switching diode is not needed for electrolytic

capacitance application and should not be used on the LS122

and LS123.

To find the value of K for Cext ≥ 1000 pF, refer to Figure 4.

Variations on VCC or VRC can cause the value of K to

change, as can the temperature of the LS123, LS122.

Figures 5 and 6 show the behavior of the circuit shown in

Figures 1 and 2 if separate power supplies are used for VCC

and VRC. If VCC is tied to VRC, Figure 7 shows how K will

vary with VCC and temperature. Remember, the changes in

Rext and Cext with temperature are not calculated and

included in the graph.

As long as Cext ≥ 1000 pF and 5K ≤ Rext ≤ 260K, the

change in K with respect to Rext is negligible.

If Cext ≤ 1000 pF the graph shown on Figure 8 can be used

to determine the output pulse width. Figure 9 shows how K

will change for Cext ≤ 1000 pF if VCC and VRC are connected

to the same power supply. The pulse width tW in

nanoseconds is approximated by

tW = 6 + 0.05 Cext (pF) + 0.45 Rext (kΩ) Cext + 11.6 Rext

In order to trim the output pulse width, it is necessary to

include a variable resistor between VCC and the Rext/Cext pin

or between VCC and the Rext pin of the LS122. Figure 10, 11,

and 12 show how this can be done. Rext remote should be

kept as close to the monostable as possible.

Retriggering of the part, as shown in Figure 3, must not

occur before Cext is discharged or the retrigger pulse will not

have any effect. The discharge time of Cext in nanoseconds

is guaranteed to be less than 0.22 Cext (pF) and is typically

0.05 Cext (pF).

For the smallest possible deviation in output pulse widths

from various devices, it is suggested that Cext be kept

≥ 1000 pF.

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