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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADP1074ARWZ-R7 датащи(PDF) 27 Page - Analog Devices |
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ADP1074ARWZ-R7 датащи(HTML) 27 Page - Analog Devices |
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27 / 32 page  Data Sheet ADP1074 Rev. D | Page 27 of 32 LAYOUT GUIDELINES The layout guidelines for the primary side are as follows: 1. Ground all the capacitors to their respective grounds. For example, ground the SS1 capacitor to AGND1. 2. Use the CS pin and the AGND1 pin to differentially sense the primary current measurement through the sense resistor. Do not cross the CS and AGND1 traces for current sensing across any switch nodes. 3. Place a capacitor (33 pF to 470 pF typical) close to the CS pin, connected to AGND1. 4. Connect the ground plane on the primary side to PGND1. 5. Connect AGND1 to PGND1 using a 0 Ω resistor. 6. Place resistors (1 Ω to 5 Ω typical) in series with NGATE and the main power MOSFET. These resistors aid in eliminating any ringing on the drive voltages. The layout guidelines for the secondary side are as follows: 1. Ground all the capacitors to their respective grounds. For example, ground the SS2 capacitor to AGND2. 2. Place resistors (1 Ω to 5 Ω) in series with SRx and the synchronous MOSFET. These resistors aid in eliminating any ringing on the drive voltages. 3. Connect the ground plane on the secondary side to PGND2. Connect the negative terminal of the output voltage to the PGND2 plane. 4. Use the FB pin and the AGND2 pin to remotely differentially sense the output voltage by connecting AGND2 to the negative terminal of the output voltage using a 0 Ω resistor. 5. Use a 100 nF capacitor on the MODE pin if light load mode is used in noisy environments. |
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